* -> non-negative val generates 0x00000000.
* Predicated OR sets 1 if val is positive.
*/
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.CMP(bld.null_reg_d(), op[0], brw_imm_d(0), BRW_CONDITIONAL_G);
bld.ASR(result, op[0], brw_imm_d(31));
inst = bld.OR(result, result, brw_imm_d(1));
inst->saturate = instr->dest.saturate;
break;
- case nir_op_fadd:
case nir_op_iadd:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
+ case nir_op_fadd:
inst = bld.ADD(result, op[0], op[1]);
inst->saturate = instr->dest.saturate;
break;
break;
case nir_op_imul:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.MUL(result, op[0], op[1]);
break;
case nir_op_imul_high:
case nir_op_umul_high:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.emit(SHADER_OPCODE_MULH, result, op[0], op[1]);
break;
case nir_op_idiv:
case nir_op_udiv:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.emit(SHADER_OPCODE_INT_QUOTIENT, result, op[0], op[1]);
break;
* appears that our hardware just does the right thing for signed
* remainder.
*/
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.emit(SHADER_OPCODE_INT_REMAINDER, result, op[0], op[1]);
break;
case nir_op_ilt:
case nir_op_ult:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.CMP(result, op[0], op[1], BRW_CONDITIONAL_L);
break;
case nir_op_ige:
case nir_op_uge:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.CMP(result, op[0], op[1], BRW_CONDITIONAL_GE);
break;
case nir_op_ieq:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.CMP(result, op[0], op[1], BRW_CONDITIONAL_Z);
break;
case nir_op_ine:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.CMP(result, op[0], op[1], BRW_CONDITIONAL_NZ);
break;
case nir_op_inot:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
if (devinfo->gen >= 8) {
op[0] = resolve_source_modifiers(op[0]);
}
bld.NOT(result, op[0]);
break;
case nir_op_ixor:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
if (devinfo->gen >= 8) {
op[0] = resolve_source_modifiers(op[0]);
op[1] = resolve_source_modifiers(op[1]);
bld.XOR(result, op[0], op[1]);
break;
case nir_op_ior:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
if (devinfo->gen >= 8) {
op[0] = resolve_source_modifiers(op[0]);
op[1] = resolve_source_modifiers(op[1]);
bld.OR(result, op[0], op[1]);
break;
case nir_op_iand:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
if (devinfo->gen >= 8) {
op[0] = resolve_source_modifiers(op[0]);
op[1] = resolve_source_modifiers(op[1]);
break;
}
- case nir_op_fmin:
case nir_op_imin:
case nir_op_umin:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
+ case nir_op_fmin:
inst = bld.emit_minmax(result, op[0], op[1], BRW_CONDITIONAL_L);
inst->saturate = instr->dest.saturate;
break;
- case nir_op_fmax:
case nir_op_imax:
case nir_op_umax:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
+ case nir_op_fmax:
inst = bld.emit_minmax(result, op[0], op[1], BRW_CONDITIONAL_GE);
inst->saturate = instr->dest.saturate;
break;
break;
case nir_op_bitfield_reverse:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.BFREV(result, op[0]);
break;
case nir_op_bit_count:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.CBIT(result, op[0]);
break;
case nir_op_ufind_msb:
case nir_op_ifind_msb: {
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.FBH(retype(result, BRW_REGISTER_TYPE_UD), op[0]);
/* FBH counts from the MSB side, while GLSL's findMSB() wants the count
}
case nir_op_find_lsb:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.FBL(result, op[0]);
break;
unreachable("should have been lowered");
case nir_op_ubfe:
case nir_op_ibfe:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.BFE(result, op[2], op[1], op[0]);
break;
case nir_op_bfm:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.BFI1(result, op[0], op[1]);
break;
case nir_op_bfi:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.BFI2(result, op[0], op[1], op[2]);
break;
unreachable("not reached: should have been lowered");
case nir_op_ishl:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.SHL(result, op[0], op[1]);
break;
case nir_op_ishr:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.ASR(result, op[0], op[1]);
break;
case nir_op_ushr:
+ assert(nir_dest_bit_size(instr->dest.dest) < 64);
bld.SHR(result, op[0], op[1]);
break;