nv50: add DXTn formats

diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 8e084e67147093ca995f8a9cb80800ff30bb2b54..ef46233f83985301ef359a5357e0d8e0d0161f27 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -57,6 +57,10 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
                case PIPE_FORMAT_A8_UNORM:
                case PIPE_FORMAT_I8_UNORM:
                case PIPE_FORMAT_A8L8_UNORM:
+               case PIPE_FORMAT_DXT1_RGB:
+               case PIPE_FORMAT_DXT1_RGBA:
+               case PIPE_FORMAT_DXT3_RGBA:
+               case PIPE_FORMAT_DXT5_RGBA:
                        return TRUE;
                default:
                        break;
@@ -96,7 +100,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, int param)
        case PIPE_CAP_GLSL:
                return 0;
        case PIPE_CAP_S3TC:
-               return 0;
+               return 1;
        case PIPE_CAP_ANISOTROPIC_FILTER:
                return 1;
        case PIPE_CAP_POINT_SPRITE:

diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index cc91c2d92408d31e2086112278ead4e870975551..239407c92bb7538c78da9f9ccf2ad870b075053e 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -85,6 +85,34 @@ nv50_tex_construct(struct nouveau_stateobj *so, struct nv50_miptree *mt)
                            NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
                            NV50TIC_0_0_FMT_8_8);
                break;
+       case PIPE_FORMAT_DXT1_RGB:
+               so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
+                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
+                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_FMT_DXT1);
+               break;
+       case PIPE_FORMAT_DXT1_RGBA:
+               so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
+                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
+                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_FMT_DXT1);
+               break;
+       case PIPE_FORMAT_DXT3_RGBA:
+               so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
+                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
+                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_FMT_DXT3);
+               break;
+       case PIPE_FORMAT_DXT5_RGBA:
+               so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
+                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
+                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_FMT_DXT5);
+               break;
        default:
                return 1;
        }

diff --git a/src/gallium/drivers/nv50/nv50_texture.h b/src/gallium/drivers/nv50/nv50_texture.h
index 6861d67b4d52a7ca69626c39c94f8a859c16dad3..aca622c73b10bb53d6b69e82060077168961e8b9 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_texture.h
+++ b/src/gallium/drivers/nv50/nv50_texture.h
@@ -50,6 +50,9 @@
 #define NV50TIC_0_0_FMT_5_6_5                                     0x00000015
 #define NV50TIC_0_0_FMT_8_8                                       0x00000018
 #define NV50TIC_0_0_FMT_8                                         0x0000001d
+#define NV50TIC_0_0_FMT_DXT1                                      0x00000024
+#define NV50TIC_0_0_FMT_DXT3                                      0x00000025
+#define NV50TIC_0_0_FMT_DXT5                                      0x00000026
 
 #define NV50TIC_0_1_OFFSET_LOW_MASK                               0xffffffff
 #define NV50TIC_0_1_OFFSET_LOW_SHIFT                                       0