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swr: [rasterizer jitter] add VMASKSTOREPS intrinsic
authorTim Rowley <timothy.o.rowley@intel.com>
Mon, 8 Aug 2016 23:42:42 +0000 (17:42 -0600)
committerTim Rowley <timothy.o.rowley@intel.com>
Wed, 10 Aug 2016 16:09:16 +0000 (11:09 -0500)
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py patch | blob | history

diff --git a/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py b/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py
index 234889b6610305f2c9b2c5a9b2e84bb554093c18..9c00f2264e0ce3ba32b2dd86e5f9a01a4025b7d2 100644 (file)
--- a/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py
+++ b/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py
@@ -97,6 +97,7 @@ intrinsics = [
         ["BEXTR_32", "x86_bmi_bextr_32", ["src", "control"]],
         ["VMASKLOADD", "x86_avx2_maskload_d_256", ["src", "mask"]],
         ["VMASKMOVPS", "x86_avx_maskload_ps_256", ["src", "mask"]],
+        ["VMASKSTOREPS", "x86_avx_maskstore_ps_256", ["src", "mask", "val"]],
         ["VPSHUFB", "x86_avx2_pshuf_b", ["a", "b"]],
         ["VPERMD", "x86_avx2_permd", ["a", "idx"]],
         ["VPERMPS", "x86_avx2_permps", ["idx", "a"]],