freedreno/a3xx/compiler: fix RA typo

Was supposed to be a '+', otherwise we end up with a negative offset and
choosing registers below the assigned range.

This seems to fix the scheduling mystery "solved" by adding in extra
delay slots.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/a3xx/ir3_depth.c b/src/gallium/drivers/freedreno/a3xx/ir3_depth.c
index 452257884dfb16f4e7ee9ca958cf9d54dc638ba6..1715f1917f0257cffbf3cbd6bcbd2d8e47d1f637 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/ir3_depth.c
+++ b/src/gallium/drivers/freedreno/a3xx/ir3_depth.c
@@ -69,13 +69,13 @@ int ir3_delayslots(struct ir3_instruction *assigner,
 
        /* assigner must be alu: */
        if (is_flow(consumer) || is_sfu(consumer) || is_tex(consumer)) {
-               return 8;
+               return 6;
        } else if ((consumer->category == 3) &&
                        is_mad(consumer->opc) && (n == 2)) {
                /* special case, 3rd src to cat3 not required on first cycle */
-               return 2;
+               return 1;
        } else {
-               return 5;
+               return 3;
        }
 }
 

diff --git a/src/gallium/drivers/freedreno/a3xx/ir3_ra.c b/src/gallium/drivers/freedreno/a3xx/ir3_ra.c
index 22c58e6c9adedf66fe05aaeb34d2d45fb780c8c7..5bc1e2f161931ee43efaf0559877b05a97e69580 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/ir3_ra.c
+++ b/src/gallium/drivers/freedreno/a3xx/ir3_ra.c
@@ -306,7 +306,7 @@ static void ra_calc_src_fanin(struct ir3_visitor *v,
 {
        struct ra_calc_visitor *c = ra_calc_visitor(v);
        unsigned srcn = ir3_instr_regno(instr, reg) - 1;
-       c->a.off -= srcn;
+       c->a.off += srcn;
        c->a.num += srcn;
        c->a.num = MAX2(c->a.num, instr->regs_count - 1);
 }