#define __DRI_IMAGE_USE_SHARE 0x0001
#define __DRI_IMAGE_USE_SCANOUT 0x0002
#define __DRI_IMAGE_USE_CURSOR 0x0004 /* Depricated */
+#define __DRI_IMAGE_USE_LINEAR 0x0008
/**
if (template->target == PIPE_BUFFER)
return i915_buffer_create(screen, template);
else
- return i915_texture_create(screen, template, FALSE);
-
+ {
+ if (!(template->bind & PIPE_BIND_LINEAR))
+ return i915_texture_create(screen, template, FALSE);
+ else
+ return i915_texture_create(screen, template, TRUE);
+ }
}
static struct pipe_resource *
* "The cursor surface address must be 4K byte aligned. The cursor must
* be in linear memory, it cannot be tiled."
*/
- if (unlikely(templ->bind & PIPE_BIND_CURSOR))
+ if (unlikely(templ->bind & (PIPE_BIND_CURSOR | PIPE_BIND_LINEAR)))
valid_tilings &= tile_none;
/*
pipe_reference_init(&pt->reference, 1);
pt->screen = pscreen;
+ if (pt->bind & PIPE_BIND_LINEAR)
+ pt->flags |= NOUVEAU_RESOURCE_FLAG_LINEAR;
+
bo_config.nv50.memtype = nv50_mt_choose_storage_type(mt, TRUE);
if (!nv50_miptree_init_ms_mode(mt)) {
}
}
+ if (pt->bind & PIPE_BIND_LINEAR)
+ pt->flags |= NOUVEAU_RESOURCE_FLAG_LINEAR;
+
bo_config.nvc0.memtype = nvc0_mt_choose_storage_type(mt, compressed);
if (!nvc0_miptree_init_ms_mode(mt)) {
enum radeon_bo_layout microtile, macrotile;
if ((base->flags & R300_RESOURCE_FLAG_TRANSFER) ||
- (base->bind & PIPE_BIND_SCANOUT)) {
+ (base->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_LINEAR))) {
microtile = RADEON_LAYOUT_LINEAR;
macrotile = RADEON_LAYOUT_LINEAR;
} else {
* because 422 formats are used for videos, which prefer linear buffers
* for fast uploads anyway. */
if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
- desc->layout != UTIL_FORMAT_LAYOUT_SUBSAMPLED) {
+ (desc->layout != UTIL_FORMAT_LAYOUT_SUBSAMPLED) &&
+ !(templ->bind & PIPE_BIND_LINEAR)) {
if (templ->flags & R600_RESOURCE_FLAG_FORCE_TILING) {
array_mode = V_038000_ARRAY_2D_TILED_THIN1;
} else if (!(templ->bind & PIPE_BIND_SCANOUT) &&
int r;
if (!(templ->flags & R600_RESOURCE_FLAG_TRANSFER) &&
- !(templ->bind & PIPE_BIND_CURSOR)) {
+ !(templ->bind & PIPE_BIND_CURSOR | PIPE_BIND_LINEAR)) {
if (templ->flags & R600_RESOURCE_FLAG_FORCE_TILING ||
templ->nr_samples > 1) {
array_mode = V_009910_ARRAY_2D_TILED_THIN1;
* The shared flag is quite underspecified, but certainly isn't a
* binding flag - it seems more like a message to the winsys to create
* a shareable allocation.
+ *
+ * The third flag has been added to be able to force textures to be created
+ * in linear mode (no tiling).
*/
#define PIPE_BIND_SCANOUT (1 << 14) /* */
#define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */
+#define PIPE_BIND_LINEAR (1 << 21)
/* Flags for the driver about resource behaviour:
tex_usage |= PIPE_BIND_SCANOUT;
if (use & __DRI_IMAGE_USE_SHARE)
tex_usage |= PIPE_BIND_SHARED;
+ if (use & __DRI_IMAGE_USE_LINEAR)
+ tex_usage |= PIPE_BIND_LINEAR;
if (use & __DRI_IMAGE_USE_CURSOR) {
if (width != 64 || height != 64)
return NULL;
tiling = I915_TILING_NONE;
}
+ if (use & __DRI_IMAGE_USE_LINEAR)
+ tiling = I915_TILING_NONE;
+
image = intel_allocate_image(format, loaderPrivate);
if (image == NULL)
return NULL;
tiling = I915_TILING_NONE;
}
+ if (use & __DRI_IMAGE_USE_LINEAR)
+ tiling = I915_TILING_NONE;
+
image = intel_allocate_image(format, loaderPrivate);
if (image == NULL)
return NULL;