static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer)
{
- GLcontext* ctx = r300->radeon.glCtx;
+ GLcontext *ctx = r300->radeon.glCtx;
__DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable;
GLuint cboffset, cbpitch;
- drm_r300_cmd_header_t* cmd2;
+ drm_r300_cmd_header_t *cmd2;
int cmd_reserved = 0;
int cmd_written = 0;
drm_radeon_cmd_header_t *cmd = NULL;
- r300ContextPtr rmesa=r300;
+ r300ContextPtr rmesa = r300;
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s: %s buffer (%i,%i %ix%i)\n",
cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN);
end_3d(rmesa);
-
+
R300_STATECHANGE(r300, cb);
reg_start(R300_RB3D_COLOROFFSET0, 0);
e32(cboffset);
-
+
if (r300->radeon.radeonScreen->cpp == 4)
cbpitch |= R300_COLOR_FORMAT_ARGB8888;
else
cbpitch |= R300_COLOR_FORMAT_RGB565;
-
+
if (r300->radeon.sarea->tiling_enabled)
cbpitch |= R300_COLOR_TILE_ENABLE;
-
+
reg_start(R300_RB3D_COLORPITCH0, 0);
e32(cbpitch);
R300_STATECHANGE(r300, cmk);
reg_start(R300_RB3D_COLORMASK, 0);
-
+
if (flags & CLEARBUFFER_COLOR) {
e32((ctx->Color.ColorMask[BCOMP] ? R300_COLORMASK0_B : 0) |
- (ctx->Color.ColorMask[GCOMP] ? R300_COLORMASK0_G : 0) |
- (ctx->Color.ColorMask[RCOMP] ? R300_COLORMASK0_R : 0) |
- (ctx->Color.ColorMask[ACOMP] ? R300_COLORMASK0_A : 0));
+ (ctx->Color.ColorMask[GCOMP] ? R300_COLORMASK0_G : 0) |
+ (ctx->Color.ColorMask[RCOMP] ? R300_COLORMASK0_R : 0) |
+ (ctx->Color.ColorMask[ACOMP] ? R300_COLORMASK0_A : 0));
} else {
e32(0);
}
-
+
R300_STATECHANGE(r300, zs);
reg_start(R300_RB3D_ZSTENCIL_CNTL_0, 2);
-
+
{
- uint32_t t1, t2;
-
- t1 = 0x0;
- t2 = 0x0;
-
- if (flags & CLEARBUFFER_DEPTH) {
- t1 |= R300_RB3D_Z_WRITE_ONLY;
- t2 |= (R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
- } else {
- t1 |= R300_RB3D_Z_DISABLED_1; // disable
- }
-
- if (flags & CLEARBUFFER_STENCIL) {
- t1 |= R300_RB3D_STENCIL_ENABLE;
- t2 |=
- (R300_ZS_ALWAYS<<R300_RB3D_ZS1_FRONT_FUNC_SHIFT) |
- (R300_ZS_REPLACE<<R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) |
- (R300_ZS_REPLACE<<R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) |
- (R300_ZS_REPLACE<<R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) |
- (R300_ZS_ALWAYS<<R300_RB3D_ZS1_BACK_FUNC_SHIFT) |
- (R300_ZS_REPLACE<<R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) |
- (R300_ZS_REPLACE<<R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) |
- (R300_ZS_REPLACE<<R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) ;
- }
-
- e32(t1);
- e32(t2);
- e32(r300->state.stencil.clear);
+ uint32_t t1, t2;
+
+ t1 = 0x0;
+ t2 = 0x0;
+
+ if (flags & CLEARBUFFER_DEPTH) {
+ t1 |= R300_RB3D_Z_WRITE_ONLY;
+ t2 |=
+ (R300_ZS_ALWAYS <<
+ R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
+ } else {
+ t1 |= R300_RB3D_Z_DISABLED_1; // disable
+ }
+
+ if (flags & CLEARBUFFER_STENCIL) {
+ t1 |= R300_RB3D_STENCIL_ENABLE;
+ t2 |=
+ (R300_ZS_ALWAYS <<
+ R300_RB3D_ZS1_FRONT_FUNC_SHIFT) |
+ (R300_ZS_REPLACE <<
+ R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) |
+ (R300_ZS_REPLACE <<
+ R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) |
+ (R300_ZS_REPLACE <<
+ R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) |
+ (R300_ZS_ALWAYS <<
+ R300_RB3D_ZS1_BACK_FUNC_SHIFT) |
+ (R300_ZS_REPLACE <<
+ R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) |
+ (R300_ZS_REPLACE <<
+ R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) |
+ (R300_ZS_REPLACE <<
+ R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT);
+ }
+
+ e32(t1);
+ e32(t2);
+ e32(r300->state.stencil.clear);
}
-
- cmd2 = (drm_r300_cmd_header_t*)r300AllocCmdBuf(r300, 9, __FUNCTION__);
+
+ cmd2 =
+ (drm_r300_cmd_header_t *) r300AllocCmdBuf(r300, 9,
+ __FUNCTION__);
cmd2[0].packet3.cmd_type = R300_CMD_PACKET3;
cmd2[0].packet3.packet = R300_CMD_PACKET3_CLEAR;
cmd2[1].u = r300PackFloat32(dPriv->w / 2.0);
cmd2[7].u = r300PackFloat32(ctx->Color.ClearColor[2]);
cmd2[8].u = r300PackFloat32(ctx->Color.ClearColor[3]);
- reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
+ reg_start(R300_RB3D_DSTCACHE_CTLSTAT, 0);
e32(R300_RB3D_DSTCACHE_UNKNOWN_0A);
-
- reg_start(R300_RB3D_ZCACHE_CTLSTAT,0);
+ reg_start(R300_RB3D_ZCACHE_CTLSTAT, 0);
e32(R300_RB3D_ZCACHE_UNKNOWN_03);
cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN);
}
static void r300EmitClearState(GLcontext * ctx)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
- r300ContextPtr rmesa=r300;
+ r300ContextPtr rmesa = r300;
__DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable;
int i;
int cmd_reserved = 0;
int has_tcl = 1;
if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
- has_tcl = 0;
-
+ has_tcl = 0;
+
R300_STATECHANGE(r300, vir[0]);
reg_start(R300_VAP_INPUT_ROUTE_0_0, 0);
if (!has_tcl)
- e32(0x22030003);
+ e32(0x22030003);
else
- e32(0x21030003);
-
+ e32(0x21030003);
+
/* disable fog */
R300_STATECHANGE(r300, fogs);
reg_start(R300_RE_FOG_STATE, 0);
e32(0x0);
-
+
R300_STATECHANGE(r300, vir[1]);
reg_start(R300_VAP_INPUT_ROUTE_1_0, 0);
e32(0xF688F688);
e32(0x00000405);
if (!has_tcl) {
- R300_STATECHANGE(r300, vte);
- /* comes from fglrx startup of clear */
- reg_start(R300_SE_VTE_CNTL, 1);
- e32(0x043f);
- e32(0x8);
-
- reg_start(0x21dc, 0);
- e32(0xaaaaaaaa);
+ R300_STATECHANGE(r300, vte);
+ /* comes from fglrx startup of clear */
+ reg_start(R300_SE_VTE_CNTL, 1);
+ e32(0x043f);
+ e32(0x8);
+
+ reg_start(0x21dc, 0);
+ e32(0xaaaaaaaa);
}
R300_STATECHANGE(r300, vof);
reg_start(R300_VAP_OUTPUT_VTX_FMT_0, 1);
- e32(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT);
- e32(0); /* no textures */
-
-
+ e32(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT |
+ R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT);
+ e32(0); /* no textures */
+
R300_STATECHANGE(r300, txe);
reg_start(R300_TX_ENABLE, 0);
e32(0);
-
+
R300_STATECHANGE(r300, vpt);
reg_start(R300_SE_VPORT_XSCALE, 5);
efloat(1.0);
efloat(dPriv->y);
efloat(1.0);
efloat(0.0);
-
+
R300_STATECHANGE(r300, at);
reg_start(R300_PP_ALPHA_TEST, 0);
e32(0);
-
+
R300_STATECHANGE(r300, bld);
reg_start(R300_RB3D_CBLEND, 1);
e32(0);
e32(0);
-
+
R300_STATECHANGE(r300, unk221C);
reg_start(R300_VAP_UNKNOWN_221C, 0);
e32(R300_221C_CLEAR);
-
+
R300_STATECHANGE(r300, ps);
reg_start(R300_RE_POINTSIZE, 0);
e32(((dPriv->w * 6) << R300_POINTSIZE_X_SHIFT) |
- ((dPriv->h * 6) << R300_POINTSIZE_Y_SHIFT));
-
+ ((dPriv->h * 6) << R300_POINTSIZE_Y_SHIFT));
+
R300_STATECHANGE(r300, ri);
reg_start(R300_RS_INTERP_0, 8);
- for(i = 0; i < 8; ++i){
+ for (i = 0; i < 8; ++i) {
e32(R300_RS_INTERP_USED);
}
reg_start(R300_RS_CNTL_0, 1);
e32((1 << R300_RS_CNTL_CI_CNT_SHIFT) | R300_RS_CNTL_0_UNKNOWN_18);
e32(0);
-
+
R300_STATECHANGE(r300, rr);
reg_start(R300_RS_ROUTE_0, 0);
e32(0x00004000);
-
+
R300_STATECHANGE(r300, fp);
reg_start(R300_PFS_CNTL_0, 2);
e32(0);
e32(0);
e32(0);
e32(R300_PFS_NODE_OUTPUT_COLOR);
-
+
R300_STATECHANGE(r300, fpi[0]);
R300_STATECHANGE(r300, fpi[1]);
R300_STATECHANGE(r300, fpi[2]);
R300_STATECHANGE(r300, fpi[3]);
-
+
reg_start(R300_PFS_INSTR0_0, 0);
- e32(FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)));
-
+ e32(FP_INSTRC
+ (MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)));
+
reg_start(R300_PFS_INSTR1_0, 0);
- e32(FP_SELC(0,NO,XYZ,FP_TMP(0),0,0));
-
+ e32(FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0));
+
reg_start(R300_PFS_INSTR2_0, 0);
e32(FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO)));
-
+
reg_start(R300_PFS_INSTR3_0, 0);
- e32(FP_SELA(0,NO,W,FP_TMP(0),0,0));
+ e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
if (has_tcl) {
- R300_STATECHANGE(r300, pvs);
- reg_start(R300_VAP_PVS_CNTL_1, 2);
- e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
- (0 << R300_PVS_CNTL_1_POS_END_SHIFT) |
- (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT));
- e32(0);
- e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT);
-
- R300_STATECHANGE(r300, vpi);
- vsf_start_fragment(0x0, 8);
- e32(VP_OUT(ADD,OUT,0,XYZW));
- e32(VP_IN(IN,0));
- e32(VP_ZERO());
- e32(0);
-
- e32(VP_OUT(ADD,OUT,1,XYZW));
- e32(VP_IN(IN,1));
- e32(VP_ZERO());
- e32(0);
+ R300_STATECHANGE(r300, pvs);
+ reg_start(R300_VAP_PVS_CNTL_1, 2);
+ e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
+ (0 << R300_PVS_CNTL_1_POS_END_SHIFT) |
+ (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT));
+ e32(0);
+ e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT);
+
+ R300_STATECHANGE(r300, vpi);
+ vsf_start_fragment(0x0, 8);
+ e32(VP_OUT(ADD, OUT, 0, XYZW));
+ e32(VP_IN(IN, 0));
+ e32(VP_ZERO());
+ e32(0);
+
+ e32(VP_OUT(ADD, OUT, 1, XYZW));
+ e32(VP_IN(IN, 1));
+ e32(VP_ZERO());
+ e32(0);
}
-
+
/*reg_start(0x4500,0);
- e32(2560-1);*/
+ e32(2560-1); */
}
/**
bits |= CLEARBUFFER_DEPTH;
mask &= ~BUFFER_BIT_DEPTH;
}
-
- if ( (mask & BUFFER_BIT_STENCIL) && r300->state.stencil.hw_stencil) {
+
+ if ((mask & BUFFER_BIT_STENCIL) && r300->state.stencil.hw_stencil) {
bits |= CLEARBUFFER_STENCIL;
mask &= ~BUFFER_BIT_STENCIL;
}
swapped = r300->radeon.sarea->pfCurrentPage == 1;
/* Make sure it fits there. */
- r300EnsureCmdBufSpace(r300, 421*3, __FUNCTION__);
- if(flags || bits)
+ r300EnsureCmdBufSpace(r300, 421 * 3, __FUNCTION__);
+ if (flags || bits)
r300EmitClearState(ctx);
if (flags & BUFFER_BIT_FRONT_LEFT) {
}
if (flags & BUFFER_BIT_BACK_LEFT) {
- r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, swapped ^ 1);
+ r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR,
+ swapped ^ 1);
bits = 0;
}
}
-
void r300Flush(GLcontext * ctx)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size)
{
struct r300_dma_buffer *dmabuf;
- size = MAX2(size, RADEON_BUFFER_SIZE*16);
-
+ size = MAX2(size, RADEON_BUFFER_SIZE * 16);
+
if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA))
fprintf(stderr, "%s\n", __FUNCTION__);
}
if (rmesa->dma.current.buf)
- r300ReleaseDmaRegion(rmesa, &rmesa->dma.current, __FUNCTION__);
+ r300ReleaseDmaRegion(rmesa, &rmesa->dma.current,
+ __FUNCTION__);
if (rmesa->dma.nr_released_bufs > 4)
r300FlushCmdBuf(rmesa, __FUNCTION__);
-
+
dmabuf = CALLOC_STRUCT(r300_dma_buffer);
- dmabuf->buf = (void *)1; /* hack */
+ dmabuf->buf = (void *)1; /* hack */
dmabuf->refcount = 1;
dmabuf->id = radeon_mm_alloc(rmesa, 4, size);
if (dmabuf->id == 0) {
LOCK_HARDWARE(&rmesa->radeon); /* no need to validate */
-
+
r300FlushCmdBufLocked(rmesa, __FUNCTION__);
radeonWaitForIdleLocked(&rmesa->radeon);
-
+
dmabuf->id = radeon_mm_alloc(rmesa, 4, size);
#ifdef HW_VBOS
if (dmabuf->id == 0) {
/* Just kick all */
- r300EvictVBOs(rmesa->radeon.glCtx, /*RADEON_BUFFER_SIZE*16*/1<<30);
+ r300EvictVBOs(rmesa->radeon.glCtx,
+ /*RADEON_BUFFER_SIZE*16 */ 1 << 30);
dmabuf->id = radeon_mm_alloc(rmesa, 4, size);
}
#endif
UNLOCK_HARDWARE(&rmesa->radeon);
-
+
if (dmabuf->id == 0) {
- fprintf(stderr, "Error: Could not get dma buffer... exiting\n");
+ fprintf(stderr,
+ "Error: Could not get dma buffer... exiting\n");
exit(-1);
}
}
-
+
rmesa->dma.current.buf = dmabuf;
rmesa->dma.current.address = radeon_mm_ptr(rmesa, dmabuf->id);
rmesa->dma.current.end = size;
}
void r300ReleaseDmaRegion(r300ContextPtr rmesa,
- struct r300_dma_region *region, const char *caller)
+ struct r300_dma_region *region,
+ const char *caller)
{
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
(rmesa->dma.current.ptr + alignment) & ~alignment;
if (rmesa->dma.current.ptr + bytes > rmesa->dma.current.end)
- r300RefillCurrentDmaRegion(rmesa,
- (bytes + 0x7) & ~0x7);
+ r300RefillCurrentDmaRegion(rmesa, (bytes + 0x7) & ~0x7);
region->start = rmesa->dma.current.start;
region->ptr = rmesa->dma.current.start;
int size = 0;
drmDMAReq dma;
int ret;
-
+
if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA))
fprintf(stderr, "%s\n", __FUNCTION__);
}
if (rmesa->dma.current.buf)
- r300ReleaseDmaRegion(rmesa, &rmesa->dma.current, __FUNCTION__);
+ r300ReleaseDmaRegion(rmesa, &rmesa->dma.current,
+ __FUNCTION__);
if (rmesa->dma.nr_released_bufs > 4)
r300FlushCmdBuf(rmesa, __FUNCTION__);
if (ret != 0) {
UNLOCK_HARDWARE(&rmesa->radeon);
- fprintf(stderr, "Error: Could not get dma buffer... exiting\n");
+ fprintf(stderr,
+ "Error: Could not get dma buffer... exiting\n");
exit(-1);
}
}
}
void r300ReleaseDmaRegion(r300ContextPtr rmesa,
- struct r300_dma_region *region, const char *caller)
+ struct r300_dma_region *region,
+ const char *caller)
{
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
drm_radeon_cmd_header_t *cmd;
if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA))
- fprintf(stderr, "%s -- DISCARD BUF %d\n", __FUNCTION__,
- region->buf->buf->idx);
+ fprintf(stderr, "%s -- DISCARD BUF %d\n",
+ __FUNCTION__, region->buf->buf->idx);
cmd =
(drm_radeon_cmd_header_t *) r300AllocCmdBuf(rmesa,
- sizeof(*cmd) / 4,
+ sizeof
+ (*cmd) / 4,
__FUNCTION__);
cmd->dma.cmd_type = R300_CMD_DMA_DISCARD;
cmd->dma.buf_idx = region->buf->buf->idx;
-
+
FREE(region->buf);
rmesa->dma.nr_released_bufs++;
}
GLint size)
{
int offset =
- (char *)pointer - (char *)rmesa->radeon.radeonScreen->gartTextures.map;
+ (char *)pointer -
+ (char *)rmesa->radeon.radeonScreen->gartTextures.map;
int valid = (size >= 0 && offset >= 0
- && offset + size < rmesa->radeon.radeonScreen->gartTextures.size);
+ && offset + size <
+ rmesa->radeon.radeonScreen->gartTextures.size);
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "r300IsGartMemory( %p ) : %d\n", pointer,
return valid;
}
-GLuint r300GartOffsetFromVirtual(r300ContextPtr rmesa, const GLvoid * pointer)
+GLuint r300GartOffsetFromVirtual(r300ContextPtr rmesa,
+ const GLvoid * pointer)
{
int offset =
- (char *)pointer - (char *)rmesa->radeon.radeonScreen->gartTextures.map;
+ (char *)pointer -
+ (char *)rmesa->radeon.radeonScreen->gartTextures.map;
//fprintf(stderr, "offset=%08x\n", offset);
- if (offset < 0 || offset > rmesa->radeon.radeonScreen->gartTextures.size)
+ if (offset < 0
+ || offset > rmesa->radeon.radeonScreen->gartTextures.size)
return ~0;
else
- return rmesa->radeon.radeonScreen->gart_texture_offset + offset;
+ return rmesa->radeon.radeonScreen->gart_texture_offset +
+ offset;
}
void r300InitIoctlFuncs(struct dd_function_table *functions)
projects / mesa.git / commitdiff