* cpu-m32r.c (arch_info_struct): New static global.

	(bfd_m32r_arch): Refer to it.
	* elf32-m32r.c (m32r_elf_object_p): Recognize E_M32RX_ARCH.
	(m32r_elf_print_private_bfd_data): Ditto.
	(m32r_elf_final_write_processing): Handle bfd_mach_m32rx.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 1f522cbe7fa3700be161208e5c18b6f40652f235..c5ca9a111c5cd58312576f381bfa6ec9e4933310 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,11 @@
+Mon Oct  4 17:49:45 1999  Nick Clifton  <nickc@cygnus.com>
+
+       * cpu-m32r.c (arch_info_struct): New static global.
+       (bfd_m32r_arch): Refer to it.
+       * elf32-m32r.c (m32r_elf_object_p): Recognize E_M32RX_ARCH.
+       (m32r_elf_print_private_bfd_data): Ditto.
+       (m32r_elf_final_write_processing): Handle bfd_mach_m32rx.
+
 1999-09-28  Fred Fish  <fnf@cygnus.com>
 
        * targets.c (cisco_core_vec): Replaced with two new vecs ...

diff --git a/bfd/cpu-m32r.c b/bfd/cpu-m32r.c
index bd3cc31963dd76b097592b0c6e24658cedceba24..895ad413b2669a93d4943c857618abf54e06d17a 100644 (file)
--- a/bfd/cpu-m32r.c
+++ b/bfd/cpu-m32r.c
@@ -27,6 +27,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #define NEXT NULL
 
+static const bfd_arch_info_type arch_info_struct[] = 
+{
+  N (bfd_mach_m32rx, "m32rx", false, NULL)
+};
+
+#undef NEXT
+#define NEXT &arch_info_struct[0]
 
 const bfd_arch_info_type bfd_m32r_arch =
   N (bfd_mach_m32r, "m32r", true, NEXT);

diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c
index f6ce3f03bda36b7593bd1742558d9be118c99e9f..e9ce55b198ff2a5d9c9ee5b2e885d00481c3631a 100644 (file)
--- a/bfd/elf32-m32r.c
+++ b/bfd/elf32-m32r.c
@@ -1793,6 +1793,7 @@ m32r_elf_object_p (abfd)
     {
     default:
     case E_M32R_ARCH:   (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r);  break;
+    case E_M32RX_ARCH:  (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
     }
   return true;
 }
@@ -1809,6 +1810,7 @@ m32r_elf_final_write_processing (abfd, linker)
     {
     default:
     case bfd_mach_m32r:  val = E_M32R_ARCH; break;
+    case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
     }
 
   elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
@@ -1926,6 +1928,7 @@ m32r_elf_print_private_bfd_data (abfd, ptr)
     {
     default:
     case E_M32R_ARCH:  fprintf (file, _(": m32r instructions"));  break;
+    case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
     }
   
   fputc ('\n', file);
@@ -2052,7 +2055,7 @@ m32r_elf_check_relocs (abfd, info, sec, relocs)
 
 #define ELF_ARCH               bfd_arch_m32r
 #define ELF_MACHINE_CODE       EM_CYGNUS_M32R
-#define ELF_MAXPAGESIZE                0x1   /* Explicitly requested by Mitsubishi */
+#define ELF_MAXPAGESIZE                0x1 /* Explicitly requested by Mitsubishi.  */
 
 #define TARGET_BIG_SYM          bfd_elf32_m32r_vec
 #define TARGET_BIG_NAME                "elf32-m32r"