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Merge pull request #2405 from byuccl/fix_xilinx_cells
authorclairexen <claire@symbioticeda.com>
Tue, 20 Oct 2020 15:11:36 +0000 (17:11 +0200)
committerGitHub <noreply@github.com>
Tue, 20 Oct 2020 15:11:36 +0000 (17:11 +0200)
xilinx/cells_sim.v: Move signal declaration to before first use


Trivial merge