Both targets define DISPLACED_MODIFIED_INSNS, each with different values.
Add ARM_ and AARCH64_ to the start of the name to prevent confusion.
No functionality changes.
gdb/ChangeLog:
* aarch64-linux-tdep.c (aarch64_linux_init_abi): Use
AARCH64_DISPLACED_MODIFIED_INSNS.
* aarch64-tdep.c (struct aarch64_displaced_step_data)
(aarch64_displaced_step_copy_insn): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from..
(AARCH64_DISPLACED_MODIFIED_INSNS): ...to this.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Use
ARM_DISPLACED_MODIFIED_INSNS.
* arm-tdep.c (arm_gdbarch_init): Likewise.
* arm-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from..
(ARM_DISPLACED_MODIFIED_INSNS): ...to this.
(struct arm_displaced_step_closure): Use
ARM_DISPLACED_MODIFIED_INSNS.
+2019-07-04 Alan Hayward <alan.hayward@arm.com>
+
+ * aarch64-linux-tdep.c (aarch64_linux_init_abi): Use
+ AARCH64_DISPLACED_MODIFIED_INSNS.
+ * aarch64-tdep.c (struct aarch64_displaced_step_data)
+ (aarch64_displaced_step_copy_insn): Likewise.
+ * aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from..
+ (AARCH64_DISPLACED_MODIFIED_INSNS): ...to this.
+ * arm-linux-tdep.c (arm_linux_cleanup_svc): Use
+ ARM_DISPLACED_MODIFIED_INSNS.
+ * arm-tdep.c (arm_gdbarch_init): Likewise.
+ * arm-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from..
+ (ARM_DISPLACED_MODIFIED_INSNS): ...to this.
+ (struct arm_displaced_step_closure): Use
+ ARM_DISPLACED_MODIFIED_INSNS.
+
2019-07-04 Alan Hayward <alan.hayward@arm.com>
* features/Makefile: Remove unused xml files.
set_gdbarch_get_syscall_number (gdbarch, aarch64_linux_get_syscall_number);
/* Displaced stepping. */
- set_gdbarch_max_insn_length (gdbarch, 4 * DISPLACED_MODIFIED_INSNS);
+ set_gdbarch_max_insn_length (gdbarch, 4 * AARCH64_DISPLACED_MODIFIED_INSNS);
set_gdbarch_displaced_step_copy_insn (gdbarch,
aarch64_displaced_step_copy_insn);
set_gdbarch_displaced_step_fixup (gdbarch, aarch64_displaced_step_fixup);
/* The address where the instruction will be executed at. */
CORE_ADDR new_addr;
/* Buffer of instructions to be copied to NEW_ADDR to execute. */
- uint32_t insn_buf[DISPLACED_MODIFIED_INSNS];
+ uint32_t insn_buf[AARCH64_DISPLACED_MODIFIED_INSNS];
/* Number of instructions in INSN_BUF. */
unsigned insn_count;
/* Registers when doing displaced stepping. */
dsd.insn_count = 0;
aarch64_relocate_instruction (insn, &visitor,
(struct aarch64_insn_data *) &dsd);
- gdb_assert (dsd.insn_count <= DISPLACED_MODIFIED_INSNS);
+ gdb_assert (dsd.insn_count <= AARCH64_DISPLACED_MODIFIED_INSNS);
if (dsd.insn_count != 0)
{
/* The maximum number of modified instructions generated for one
single-stepped instruction. */
-#define DISPLACED_MODIFIED_INSNS 1
+#define AARCH64_DISPLACED_MODIFIED_INSNS 1
/* Target-dependent structure in gdbarch. */
struct gdbarch_tdep
within_scratch = (apparent_pc >= dsc->scratch_base
&& apparent_pc < (dsc->scratch_base
- + DISPLACED_MODIFIED_INSNS * 4 + 4));
+ + ARM_DISPLACED_MODIFIED_INSNS * 4 + 4));
if (debug_displaced)
{
/* Note: for displaced stepping, this includes the breakpoint, and one word
of additional scratch space. This setting isn't used for anything beside
displaced stepping at present. */
- set_gdbarch_max_insn_length (gdbarch, 4 * DISPLACED_MODIFIED_INSNS);
+ set_gdbarch_max_insn_length (gdbarch, 4 * ARM_DISPLACED_MODIFIED_INSNS);
/* This should be low enough for everything. */
tdep->lowest_pc = 0x20;
/* The maximum number of modified instructions generated for one single-stepped
instruction, including the breakpoint (usually at the end of the instruction
sequence) and any scratch words, etc. */
-#define DISPLACED_MODIFIED_INSNS 8
+#define ARM_DISPLACED_MODIFIED_INSNS 8
struct arm_displaced_step_closure : public displaced_step_closure
{
- ARM instruction occupies one slot,
- Thumb 16 bit instruction occupies one slot,
- Thumb 32-bit instruction occupies *two* slots, one part for each. */
- unsigned long modinsn[DISPLACED_MODIFIED_INSNS];
+ unsigned long modinsn[ARM_DISPLACED_MODIFIED_INSNS];
int numinsns;
CORE_ADDR insn_addr;
CORE_ADDR scratch_base;