+2021-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/noreg64.s: Add sysexit.
+ * testsuite/gas/i386/x86-64-sysenter-amd.s: Split sysexit into
+ sysexitl and sysexitq.
+ * testsuite/gas/i386/noreg-intel64.l,
+ testsuite/gas/i386/noreg64-data16.d,
+ testsuite/gas/i386/noreg64-data16.e,
+ testsuite/gas/i386/noreg64-rex64.d,
+ testsuite/gas/i386/noreg64.d,
+ testsuite/gas/i386/noreg64.l,
+ testsuite/gas/i386/x86-64-sysenter-amd.d,
+ testsuite/gas/i386/x86-64-sysenter-amd.l,
+ testsuite/gas/i386/x86-64-sysenter-intel.d: Adjust expectations.
+
2021-02-26 Nick Clifton <nickc@redhat.com>
PR 27411
.*:[1-9][0-9]*: Warning: .* `sub'
.*:[1-9][0-9]*: Warning: .* `sub'
.*:[1-9][0-9]*: Warning: .* `sub'
+.*:[1-9][0-9]*: Warning: .* `sysexit'
.*:[1-9][0-9]*: Warning: .* `sysret'
.*:[1-9][0-9]*: Warning: .* `test'
.*:[1-9][0-9]*: Warning: .* `test'
*[a-f0-9]+: 66 81 28 89 00 subw \$0x89,\(%rax\)
*[a-f0-9]+: 66 81 28 34 12 subw \$0x1234,\(%rax\)
*[a-f0-9]+: 66 81 28 78 56 subw \$0x5678,\(%rax\)
+ *[a-f0-9]+: 66 0f 35 data16 sysexitl *
*[a-f0-9]+: 66 0f 07 data16 sysretl *
*[a-f0-9]+: 66 f7 00 89 00 testw \$0x89,\(%rax\)
*[a-f0-9]+: 66 f7 00 34 12 testw \$0x1234,\(%rax\)
.*:117: Warning: .*shortened.*
.*:146: Warning: .*shortened.*
.*:170: Warning: .*shortened.*
-.*:174: Warning: .*shortened.*
-.*:178: Warning: .*shortened.*
+.*:175: Warning: .*shortened.*
+.*:179: Warning: .*shortened.*
*[a-f0-9]+: 48 81 28 89 00 00 00 subq \$0x89,\(%rax\)
*[a-f0-9]+: 48 81 28 34 12 00 00 subq \$0x1234,\(%rax\)
*[a-f0-9]+: 48 81 28 78 56 34 12 subq \$0x12345678,\(%rax\)
+ *[a-f0-9]+: 48 0f 35 sysexitq *
*[a-f0-9]+: 48 0f 07 sysretq *
*[a-f0-9]+: 48 f7 00 89 00 00 00 testq \$0x89,\(%rax\)
*[a-f0-9]+: 48 f7 00 34 12 00 00 testq \$0x1234,\(%rax\)
*[a-f0-9]+: 81 28 89 00 00 00 subl \$0x89,\(%rax\)
*[a-f0-9]+: 81 28 34 12 00 00 subl \$0x1234,\(%rax\)
*[a-f0-9]+: 81 28 78 56 34 12 subl \$0x12345678,\(%rax\)
+ *[a-f0-9]+: 0f 35 sysexitl *
*[a-f0-9]+: 0f 07 sysretl *
*[a-f0-9]+: f7 00 89 00 00 00 testl \$0x89,\(%rax\)
*[a-f0-9]+: f7 00 34 12 00 00 testl \$0x1234,\(%rax\)
.*:[1-9][0-9]*: Warning: .* `sub'
.*:[1-9][0-9]*: Warning: .* `sub'
.*:[1-9][0-9]*: Warning: .* `sub'
+.*:[1-9][0-9]*: Warning: .* `sysexit'
.*:[1-9][0-9]*: Warning: .* `sysret'
.*:[1-9][0-9]*: Warning: .* `test'
.*:[1-9][0-9]*: Warning: .* `test'
pfx sub $0x89, (%rax)
pfx sub $0x1234, (%rax)
pfx sub $0x12345678, (%rax)
+ pfx sysexit
pfx sysret
pfx test $0x89, (%rax)
pfx test $0x1234, (%rax)
0+ <.text>:
[ ]*[a-f0-9]+:[ ]+0f 34[ ]+\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]+0f 35[ ]+\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]+48 0f 35[ ]+\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]+0f 34[ ]+\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]+0f 35[ ]+\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]+48 0f 35[ ]+\(bad\)[ ]*
#pass
.*: Assembler messages:
.*:2: Error: .*
.*:3: Error: .*
-.*:6: Error: .*
+.*:4: Error: .*
.*:7: Error: .*
+.*:8: Error: .*
+.*:9: Error: .*
.text
sysenter
- sysexit
+ sysexitl
+ sysexitq
.intel_syntax noprefix
sysenter
- sysexit
+ sysexitd
+ sysexitq
0+ <.text>:
[ ]*[a-f0-9]+: 0f 34 sysenter *
-[ ]*[a-f0-9]+: 0f 35 sysexit *
+[ ]*[a-f0-9]+: 0f 35 sysexitl *
+[ ]*[a-f0-9]+: 48 0f 35 sysexitq *
[ ]*[a-f0-9]+: 0f 34 sysenter *
-[ ]*[a-f0-9]+: 0f 35 sysexit *
+[ ]*[a-f0-9]+: 0f 35 sysexitl *
+[ ]*[a-f0-9]+: 48 0f 35 sysexitq *
#pass
+2021-03-09 Jan Beulich <jbeulich@suse.com>
+
+ * opcodes/i386-dis.c (dis386_twobyte): Add %LQ to sysexit.
+ * opcodes/i386-opc.tbl (sysexit): Drop No_lSuf and No_qSuf from
+ 64-bit form.
+ * opcodes/i386-tbl.h: Re-generate.
+
2021-03-03 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (output_i386_opcode): Don't get operand count. Look
{ "rdmsr", { XX }, 0 },
{ "rdpmc", { XX }, 0 },
{ "sysenter", { SEP }, 0 },
- { "sysexit", { SEP }, 0 },
+ { "sysexit%LQ", { SEP }, 0 },
{ Bad_Opcode },
{ "getsec", { XX }, 0 },
/* 38 */
// Pentium II/Pentium Pro extensions.
sysenter, 0xf34, None, 2, Cpu64, Intel64Only|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
sysenter, 0xf34, None, 2, Cpu686|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
-sysexit, 0xf35, None, 2, Cpu64, Intel64Only|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
+sysexit, 0xf35, None, 2, Cpu64, Intel64Only|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, {}
sysexit, 0xf35, None, 2, Cpu686|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
fxsave, 0xfae, 0x0, 2, CpuFXSR, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf, { Unspecified|BaseIndex }
fxsave64, 0xfae, 0x0, 2, CpuFXSR|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64, { Unspecified|BaseIndex }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 1, 0, 0 } },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,