(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index eb59d1ecdbb19d1240eebec71b498e4ead3ee4ae..9fb2c90100b373a934b432cc7357c038504638ad 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -891,10 +891,11 @@ the computation. In this case, that's an expensive inconvenience
 (similar to the problems associated with Memory-to-Memory
 Vector Machines such as the CDC Star-100).
 
-Vertical-First allows *scalar* temporary registers to be utilised
+Vertical-First allows *scalar* instructions and
+*scalar* temporary registers to be utilised
 in the assessment as to whether a particular Vector element should
 be skipped, utilising a straight Branch instruction *(or ZOLC
-Conditions)*.  This technique
+Conditions)*.  The Vertical Vector technique
 is pioneered by Mitch Alsup and is a key feature of his VVM Extension
 to MyISA 66000.  Careful analysis of the registers within the
 Vertical-First Loop allows a Multi-Issue Out-of-Order Engine to
@@ -906,10 +907,11 @@ in-flight Reservation Stations in the first place.
 (With thanks and gratitude to Mitch Alsup on comp.arch for
 spending considerable time explaining VVM, how its Loop
 Construct explicitly identifies loop-invariant registers,
-and how that helps to exploit a GB-OoO Micro-architectures)
+and how that helps Register Hazards and SIMD amortisation
+on a GB-OoO Micro-architecture)
 </blockquote>*
 
-**Use-case: More powerful in-memory PEs**
+**Use-case variant: More powerful in-memory PEs**
 
 An obvious variant of the above is that, if there is inherently
 more parallelism in the data set, then the PEs get their own