+2001-06-27 Joseph S. Myers <jsm28@cam.ac.uk>
+
+ * doc/cpp.texi, doc/cppinternals.texi, doc/extend.texi,
+ doc/gcc.texi, doc/install.texi, doc/invoke.texi, doc/md.texi,
+ doc/tm.texi: Use @: where necessary when a full stop does not end
+ a sentence.
+
2001-06-27 Joseph S. Myers <jsm28@cam.ac.uk>
* doc/gcc.texi, doc/install.texi, doc/invoke.texi: Remove trailing
@cindex wrapper @code{#ifndef}
If a header file happens to be included twice, the compiler will process
-its contents twice. This is very likely to cause an error, e.g. when the
+its contents twice. This is very likely to cause an error, e.g.@: when the
compiler sees the same structure definition twice. Even if it does not,
it will certainly waste time.
This macro will have the correct definition even if
@option{-f(no-)underscores} is in use, but it will not be correct if
-target-specific options that adjust this prefix are used (e.g. the
+target-specific options that adjust this prefix are used (e.g.@: the
OSF/rose @option{-mno-underscores} option).
@item __SIZE_TYPE__
The ISO standard specifies that it is implementation defined whether a
preprocessor preserves whitespace between tokens, or replaces it with
-e.g. a single space. In GNU CPP, whitespace between tokens is collapsed
+e.g.@: a single space. In GNU CPP, whitespace between tokens is collapsed
to become a single space, with the exception that the first token on a
non-directive line is preceded with sufficient spaces that it appears in
the same column in the preprocessed output that it appeared in in the
@item
Traditional mode preserves the amount and form of whitespace provided by
-the user. Hard tabs remain hard tabs. This can be useful, e.g. if you
+the user. Hard tabs remain hard tabs. This can be useful, e.g.@: if you
are preprocessing a Makefile (which we do not encourage).
@end itemize
back. This will make future changes to support different character
sets, in particular state or shift-dependent ones, much easier.
-This file also contains all information needed to spell a token, i.e. to
+This file also contains all information needed to spell a token, i.e.@: to
output it either in a diagnostic or to a preprocessed output file. This
information is not exported, but made available to clients through such
functions as @samp{cpp_spell_token} and @samp{cpp_token_len}.
Instead GCC allows static initialization of flexible array members.
This is equivalent to defining a new structure containing the original
structure followed by an array of sufficient size to contain the data.
-I.e. in the following, @code{f1} is constructed as if it were declared
+I.e.@: in the following, @code{f1} is constructed as if it were declared
like @code{f2}.
@example
@cindex @code{qsort}, and global register variables
It is not safe for one function that uses a global register variable to
call another such function @code{foo} by way of a third function
-@code{lose} that was compiled without knowledge of this variable (i.e. in a
+@code{lose} that was compiled without knowledge of this variable (i.e.@: in a
different source file in which the variable wasn't declared). This is
because @code{lose} might save the register and put some other value there.
For example, you can't expect a global register variable to be available in
g++ has extended the template instantiation syntax outlined in the
Working Paper to allow forward declaration of explicit instantiations
(with @code{extern}), instantiation of the compiler support data for a
-template class (i.e. the vtable) without instantiating any of its
+template class (i.e.@: the vtable) without instantiating any of its
members (with @code{inline}), and instantiation of only the static data
members of a template class, without the support data or member
functions (with (@code{static}):
"@var{filename}"} to the top of some @samp{.C} file which
@samp{#include}s it. Then compile everything with
@option{-fexternal-templates}. The templates will then only be expanded
-in the translation unit which implements them (i.e. has a @samp{#pragma
+in the translation unit which implements them (i.e.@: has a @samp{#pragma
implementation} line for the file where they live); all other files will
use external references. If you're lucky, everything should work
properly. If you get undefined symbol errors, you need to make sure
fptr p = (fptr)(a.*fp);
@end example
-For PMF constants (i.e. expressions of the form @samp{&Klasse::Member}),
+For PMF constants (i.e.@: expressions of the form @samp{&Klasse::Member}),
no object is needed to obtain the address of the function. They can be
converted to function pointers directly:
implement.
@item
-K&R compilers allow comments to cross over an inclusion boundary (i.e.
-started in an include file and ended in the including file). I think
+K&R compilers allow comments to cross over an inclusion boundary
+(i.e.@: started in an include file and ended in the including file). I think
this would be quite ugly and can't imagine it could be needed.
@cindex external declaration scope
the include file.
@item
-If the file specification is not a valid VMS filename (i.e. does not
+If the file specification is not a valid VMS filename (i.e.@: does not
contain a device or a directory specifier, and contains a @samp{/}
character), the preprocessor tries to convert it from Unix syntax to
VMS syntax.
@settitle Installing GCC: Binaries
@end ifset
-@comment $Id: install.texi,v 1.35 2001/06/26 22:47:09 jsm28 Exp $
+@comment $Id: install.texi,v 1.36 2001/06/26 23:23:32 jsm28 Exp $
@c Copyright (C) 2001 Free Software Foundation, Inc.
@c *** Converted to texinfo by Dean Wakerley, dean@wakerley.com
target system triple, such as @var{sparc-sun-solaris2.7}, and
@var{version} denotes the GCC version, such as 2.95.2.
@item
-Check operating system specific directories (e.g. @file{/usr/ccs/bin} on
+Check operating system specific directories (e.g.@: @file{/usr/ccs/bin} on
Sun Solaris).
@end itemize
Note that these rules do not check for the value of @env{PATH}. You may
Specify which cpu variant the
compiler should generate code for by default. This is currently
only supported on the some ports, specifically arm, powerpc, and
-SPARC. If configure does not recognize the model name (e.g. arm700,
+SPARC. If configure does not recognize the model name (e.g.@: arm700,
603e, or ultrasparc) you provide, please check the configure script
for a complete list of supported models.
@item
In order to run the libio tests in GCC 2.95 and earlier versions of GCC
on targets which do not fully
-support Unix/POSIX commands (e.g. Cygwin), the references to the @file{dbz}
+support Unix/POSIX commands (e.g.@: Cygwin), the references to the @file{dbz}
directory have to be deleted from @file{libio/configure.in}.
@item
<hr>
@end html
@heading @anchor{m68k-att-sysv}m68k-att-sysv
-AT&T 3b1, a.k.a. 7300 PC. This version of GCC cannot
+AT&T 3b1, a.k.a.@: 7300 PC. This version of GCC cannot
be compiled with the system C compiler, which is too buggy.
You will need to get a previous version of GCC and use it to
bootstrap. Binaries are available from the OSU-CIS archive, at
involved and difficult to fix. It affects a number of other targets also,
but IRIX 6 is affected the most, because it is a 64 bit target, and 4 byte
structures are common. The exact problem is that structures are being padded
-at the wrong end, e.g. a 4 byte structure is loaded into the lower 4 bytes
+at the wrong end, e.g.@: a 4 byte structure is loaded into the lower 4 bytes
of the register when it should be loaded into the upper 4 bytes of the
register.
Same as @option{-ansi}
@item iso9899:199409
-ISO C as modified in amend. 1
+ISO C as modified in amendment 1
@item iso9899:1999
ISO C99. Note that this standard is not yet fully supported; see
@item -fno-implicit-templates
@opindex fno-implicit-templates
Never emit code for non-inline templates which are instantiated
-implicitly (i.e. by use); only emit code for explicit instantiations.
+implicitly (i.e.@: by use); only emit code for explicit instantiations.
@xref{Template Instantiation}, for more information.
@item -fno-implicit-inline-templates
@cindex message formatting
Traditionally, diagnostic messages have been formatted irrespective of
-the output device's aspect (e.g. its width, @dots{}). The options described
+the output device's aspect (e.g.@: its width, @dots{}). The options described
below can be used to control the diagnostic messages formatting
-algorithm, e.g. how many characters per line, how often source location
+algorithm, e.g.@: how many characters per line, how often source location
information should be reported. Right now, only the C++ front end can
honor these options. However it is expected, in the near future, that
the remaining front ends would be able to digest them correctly.
The @samp{U} integer constant suffix, or the @samp{F} or @samp{L} floating point
constant suffixes. (Traditional C does support the @samp{L} suffix on integer
constants.) Note, these suffixes appear in macros defined in the system
-headers of most modern systems, e.g. the @samp{_MIN}/@samp{_MAX} macros in @code{<limits.h>}.
+headers of most modern systems, e.g.@: the @samp{_MIN}/@samp{_MAX} macros in @code{<limits.h>}.
Use of these macros in user code might normally lead to spurious
warnings, however gcc's integrated preprocessor has enough context to
avoid warning in these cases.
@item
The ISO type of an integer constant has a different width or
signedness from its traditional type. This warning is only issued if
-the base of the constant is ten. I.e. hexadecimal or octal values, which
+the base of the constant is ten. I.e.@: hexadecimal or octal values, which
typically represent bit patterns, are not warned about.
@item
@item
Initialization of unions. If the initializer is zero, the warning is
omitted. This is done under the assumption that the zero initializer in
-user code appears conditioned on e.g. @code{__STDC__} to avoid missing
+user code appears conditioned on e.g.@: @code{__STDC__} to avoid missing
initializer warnings and relies on default initialization to zero in the
traditional C case.
@item %@{@code{S}*:@code{X}@}
Substitutes @code{X} if one or more switches whose names start with
@code{-S} are specified to GCC. Note that the tail part of the
-@code{-S} option (i.e. the part matched by the @samp{*}) will be substituted
+@code{-S} option (i.e.@: the part matched by the @samp{*}) will be substituted
for each occurrence of @samp{%*} within @code{X}.
@item %@{@code{S}:@code{X}@}
Earlier we discussed the standard option @option{-b} which chooses among
different installed compilers for completely different target
-machines, such as Vax vs. 68000 vs. 80386.
+machines, such as Vax vs.@: 68000 vs.@: 80386.
In addition, each of these target machine types can have its own
special options, starting with @samp{-m}, to choose among various
@opindex mno-alignment-traps
Generate code that assumes that the MMU will not trap unaligned
accesses. This produces better code when the target instruction set
-does not have half-word memory operations (i.e. implementations prior to
+does not have half-word memory operations (i.e.@: implementations prior to
ARMv4).
Note that you cannot use this option to access unaligned word objects,
@item -mc400
@opindex mc400
-Produce code for a C400 Clipper processor i.e. use floating point
+Produce code for a C400 Clipper processor i.e.@: use floating point
registers f8---f15.
@end table
Generate code that allows trapping instructions to throw exceptions.
Note that this requires platform-specific runtime support that does
not exist everywhere. Moreover, it only allows @emph{trapping}
-instructions to throw exceptions, i.e. memory references or floating
+instructions to throw exceptions, i.e.@: memory references or floating
point instructions. It does not allow exceptions to be thrown from
arbitrary signal handlers such as @code{SIGALRM}.
deciding whether the expression to be matched ``has'' that mode.
When constructing an insn, argument 3 of the gen-function will specify
-the operation (i.e. the expression code) for the expression to be
+the operation (i.e.@: the expression code) for the expression to be
made. It should be an RTL expression, whose expression code is copied
into a new expression whose operands are arguments 1 and 2 of the
gen-function. The subexpressions of argument 3 are not used;
@code{__builtin_apply} on machines where special instructions are needed
to call a subroutine with arbitrary arguments or to save the value
returned. This instruction pattern is required on machines that have
-multiple registers that can hold a return value (i.e.
-@code{FUNCTION_VALUE_REGNO_P} is true for more than one register).
+multiple registers that can hold a return value
+(i.e.@: @code{FUNCTION_VALUE_REGNO_P} is true for more than one register).
@cindex @code{return} instruction pattern
@item @samp{return}
When @code{define_cond_exec} is used, an implicit reference to
the @code{predicable} instruction attribute is made.
-@xref{Insn Attributes}. This attribute must be boolean (i.e. have
+@xref{Insn Attributes}. This attribute must be boolean (i.e.@: have
exactly two elements in its @var{list-of-values}). Further, it must
not be used with complex expressions. That is, the default and all
uses in the insns must be a simple constant, not dependent on the
contains the incoming first argument. Assume that this argument
contains a pointer, and is the one used to pass the @code{this} pointer
in C++. This is the incoming argument @emph{before} the function prologue,
-e.g. @samp{%o0} on a sparc. The addition must preserve the values of
+e.g.@: @samp{%o0} on a sparc. The addition must preserve the values of
all other incoming arguments.
After the addition, emit code to jump to @var{function}, which is a
assembler code should only be output
if the global compile flag @code{profile_block_flag} == 2. This
macro has to be used at every place where code for returning from
-a function is generated (e.g. @code{FUNCTION_EPILOGUE}). Although
+a function is generated (e.g.@: @code{FUNCTION_EPILOGUE}). Although
you have to write the definition of @code{FUNCTION_EPILOGUE}
as well, you have to define this macro to tell the compiler, that
the proper call to @code{__bb_trace_ret} is produced.
@findex SLOW_BYTE_ACCESS
@item SLOW_BYTE_ACCESS
Define this macro as a C expression which is nonzero if accessing less
-than a word of memory (i.e. a @code{char} or a @code{short}) is no
+than a word of memory (i.e.@: a @code{char} or a @code{short}) is no
faster than accessing a word of memory, i.e., if such access
require more than one instruction or if there is no difference in cost
between byte and (aligned) word loads.
@item ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL (@var{stream}, @var{symbol}, @var{high}, @var{low})
A C statement to output to the stdio stream @var{stream} assembler code
which defines (equates) the symbol @var{symbol} to have a value equal to
-the difference of the two symbols @var{high} and @var{low}, i.e.
-@var{high} minus @var{low}. GCC guarantees that the symbols @var{high}
+the difference of the two symbols @var{high} and @var{low},
+i.e.@: @var{high} minus @var{low}. GCC guarantees that the symbols @var{high}
and @var{low} are already known by the assembler so that the difference
resolves into a constant.
Don't define this macro if it has nothing to do, but it is helpful in
reading assembly output if the extent of the delay sequence is made
-explicit (e.g. with white space).
+explicit (e.g.@: with white space).
@findex final_sequence
Note that output routines for instructions with delay slots must be
-prepared to deal with not being output as part of a sequence (i.e.
-when the scheduling pass is not run, or when no slot fillers could be
+prepared to deal with not being output as part of a sequence
+(i.e.@: when the scheduling pass is not run, or when no slot fillers could be
found.) The variable @code{final_sequence} is null when not
processing a sequence, otherwise it contains the @code{sequence} rtx
being output.
the FPSCR PR bit has to be cleared, while for a double precision
operation, this bit has to be set. Changing the PR bit requires a general
purpose register as a scratch register, hence these FPSCR sets have to
-be inserted before reload, i.e. you can't put this into instruction emitting
+be inserted before reload, i.e.@: you can't put this into instruction emitting
or MACHINE_DEPENDENT_REORG.
You can have multiple entities that are mode-switched, and select at run time