* interp.c (do_format_5): Get operands correctly and

        call the target function.
        (sim_resume): Don't do a PC update for format 5 instructions.
        * simops.c: Handle "jarl" and "jmp" instructions.

diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index de4624c22e295e98f0fa494af7bfd6532a313ac5..f45f4d46556f74a13f9eb950c45d5c391cef8c43 100644 (file)
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,5 +1,10 @@
 Thu Aug 29 13:53:29 1996  Jeffrey A Law  (law@cygnus.com)
 
+       * interp.c (do_format_5): Get operands correctly and
+       call the target function.
+       (sim_resume): Don't do a PC update for format 5 instructions.
+       * simops.c: Handle "jarl" and "jmp" instructions.
+
        * simops.c: Fix minor typos.  Handle "cmp", "setf", "tst"
        "di", and "ei" instructions correctly.
 

diff --git a/sim/v850/interp.c b/sim/v850/interp.c
index 1cd990e8ecee94f173304c5ba2148295e1b3e740..d824590e39d7f34593959e85b28d017dff4b021e 100644 (file)
--- a/sim/v850/interp.c
+++ b/sim/v850/interp.c
@@ -186,7 +186,13 @@ static void
 do_format_5 (insn)
      uint32 insn;
 {
+  struct hash_entry *h;
   printf("format 5 0x%x\n", insn);
+
+  h = lookup_hash (insn);
+  OP[0] = ((insn & 0x3f) | (((insn >> 17) & 0x7fff) << 6)) << 1;
+  OP[1] = (insn >> 11) & 0x1f;
+  (h->ops->func) ();
 }
 
 static void
@@ -380,7 +386,7 @@ sim_resume (step, siggnal)
      else if ((opcode & 0x3E) == 0x3C)
        {
         do_format_5 (inst);
-        PC += 4;
+        /* No PC update, it's done in the instruction.  */
        }
      else if ((opcode & 0x3F) == 0x3E)
        {

diff --git a/sim/v850/simops.c b/sim/v850/simops.c
index 31c56c487bd6442071745e7f35dd538767b13c1b..7ac1a44fc714529c530cb257908898824f97555a 100644 (file)
--- a/sim/v850/simops.c
+++ b/sim/v850/simops.c
@@ -291,11 +291,32 @@ OP_58F ()
     State.pc += 2;
 }
 
+/* jmp [reg1] */
 void
-OP_660 ()
+OP_60 ()
 {
+  /* interp.c will bump this by +2, so correct for it here.  */
+  State.pc = State.regs[OP[0]] - 2;
 }
 
+/* jarl disp22, reg */
+void
+OP_780 ()
+{
+  unsigned int op0, opc;
+  int temp;
+
+  temp = OP[0];
+  temp = (temp << 10) >> 10;
+  op0 = temp;
+  opc = State.pc;
+
+  State.pc += temp;
+
+  /* Gross.  jarl X,r0 is really jr and doesn't save its result.  */
+  if (OP[1] != 0)
+    State.regs[OP[1]] = opc + 4;
+}
 
 /* add reg, reg */
 void
@@ -641,21 +662,11 @@ OP_10720 ()
 {
 }
 
-void
-OP_780 ()
-{
-}
-
 void
 OP_720 ()
 {
 }
 
-void
-OP_60 ()
-{
-}
-
 void
 OP_87C0 ()
 {
@@ -1094,3 +1105,8 @@ OP_700 ()
 {
 }
 
+void
+OP_660 ()
+{
+}
+