intel/tools: Add ROL/ROR support in assembler

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/intel/tools/i965_gram.y b/src/intel/tools/i965_gram.y
index bbe7ce53f6b7fff3dcf34f7c6d318e5db56adfbd..2b906a275039b3059daa761a53c9abd6e73bc2bf 100644 (file)
--- a/src/intel/tools/i965_gram.y
+++ b/src/intel/tools/i965_gram.y
@@ -189,6 +189,12 @@ i965_asm_binary_instruction(int opcode,
        case BRW_OPCODE_PLN:
                brw_PLN(p, dest, src0, src1);
                break;
+       case BRW_OPCODE_ROL:
+               brw_ROL(p, dest, src0, src1);
+               break;
+       case BRW_OPCODE_ROR:
+               brw_ROR(p, dest, src0, src1);
+               break;
        case BRW_OPCODE_SAD2:
                fprintf(stderr, "Opcode BRW_OPCODE_SAD2 unhandled\n");
                break;
@@ -720,6 +726,8 @@ binaryopcodes:
        | MACH
        | MUL
        | PLN
+       | ROL
+       | ROR
        | SAD2
        | SADA2
        | SUBB

diff --git a/src/intel/tools/i965_lex.l b/src/intel/tools/i965_lex.l
index 3aa2bd6408325b77d41fb9a733b2b17396bfcbdb..3732c6c24c044296aeddd6c59ff46f38c65e3a4c 100644 (file)
--- a/src/intel/tools/i965_lex.l
+++ b/src/intel/tools/i965_lex.l
@@ -112,6 +112,8 @@ rndd                { yylval.integer = BRW_OPCODE_RNDD; return RNDD; }
 rnde           { yylval.integer = BRW_OPCODE_RNDE; return RNDE; }
 rndu           { yylval.integer = BRW_OPCODE_RNDU; return RNDU; }
 rndz           { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; }
+rol            { yylval.integer = BRW_OPCODE_ROL; return ROL; }
+ror            { yylval.integer = BRW_OPCODE_ROR; return ROR; }
 sad2           { yylval.integer = BRW_OPCODE_SAD2; return SAD2; }
 sada2          { yylval.integer = BRW_OPCODE_SADA2; return SADA2; }
 sel            { yylval.integer = BRW_OPCODE_SEL; return SEL; }