ac: add radeon_info::num_rings and move ring_type to amd_family.h

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 23dcb190a3fd4dc4048aca70e981666ae4700f20..c40427987f74af4279eba51875c9106a11ba7714 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -500,8 +500,8 @@ bool ac_query_gpu_info(int fd, void *dev_p,
        assert(util_is_power_of_two_or_zero(compute.available_rings + 1));
 
        info->has_graphics = gfx.available_rings > 0;
-       info->num_sdma_rings = util_bitcount(dma.available_rings);
-       info->num_compute_rings = util_bitcount(compute.available_rings);
+       info->num_rings[RING_DMA] = util_bitcount(dma.available_rings);
+       info->num_rings[RING_COMPUTE] = util_bitcount(compute.available_rings);
 
        /* The mere presence of CLEAR_STATE in the IB causes random GPU hangs
         * on GFX6. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
@@ -708,8 +708,8 @@ void ac_print_gpu_info(struct radeon_info *info)
 
        printf("Features:\n");
        printf("    has_graphics = %i\n", info->has_graphics);
-       printf("    num_compute_rings = %u\n", info->num_compute_rings);
-       printf("    num_sdma_rings = %i\n", info->num_sdma_rings);
+       printf("    num_rings[RING_COMPUTE] = %u\n", info->num_rings[RING_COMPUTE]);
+       printf("    num_rings[RING_DMA] = %i\n", info->num_rings[RING_DMA]);
        printf("    has_clear_state = %u\n", info->has_clear_state);
        printf("    has_distributed_tess = %u\n", info->has_distributed_tess);
        printf("    has_dcc_constant_encode = %u\n", info->has_dcc_constant_encode);

diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index cffa0b7b22212e8fbc33aa9d1e3ef5e8eb5f9908..412332ea70d1df74a195af90bf3ad8ba9e8db701 100644 (file)
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -57,8 +57,7 @@ struct radeon_info {
 
        /* Features. */
        bool                        has_graphics; /* false if the chip is compute-only */
-       uint32_t                    num_compute_rings;
-       uint32_t                    num_sdma_rings;
+       uint32_t                    num_rings[NUM_RING_TYPES];
        bool                        has_clear_state;
        bool                        has_distributed_tess;
        bool                        has_dcc_constant_encode;

diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index 2386eecb5d40e51caf19d70e51b5e9e26d26c109..ffcc1bd924096aef5a5ee85118c001f19feacbb5 100644 (file)
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -121,4 +121,17 @@ enum chip_class {
     GFX10,
 };
 
+enum ring_type {
+    RING_GFX = 0,
+    RING_COMPUTE,
+    RING_DMA,
+    RING_UVD,
+    RING_VCE,
+    RING_UVD_ENC,
+    RING_VCN_DEC,
+    RING_VCN_ENC,
+    RING_VCN_JPEG,
+    NUM_RING_TYPES,
+};
+
 #endif

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 226eee0246a8b4f388f44963d2ae6f5399280671..15cc163c1401f619604aa20c495352d7de4d3c06 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1701,7 +1701,7 @@ static void radv_get_physical_device_queue_family_properties(
 {
        int num_queue_families = 1;
        int idx;
-       if (pdevice->rad_info.num_compute_rings > 0 &&
+       if (pdevice->rad_info.num_rings[RING_COMPUTE] > 0 &&
            !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE))
                num_queue_families++;
 
@@ -1727,14 +1727,14 @@ static void radv_get_physical_device_queue_family_properties(
                idx++;
        }
 
-       if (pdevice->rad_info.num_compute_rings > 0 &&
+       if (pdevice->rad_info.num_rings[RING_COMPUTE] > 0 &&
            !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE)) {
                if (*pCount > idx) {
                        *pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) {
                                .queueFlags = VK_QUEUE_COMPUTE_BIT |
                                              VK_QUEUE_TRANSFER_BIT |
                                              VK_QUEUE_SPARSE_BINDING_BIT,
-                               .queueCount = pdevice->rad_info.num_compute_rings,
+                               .queueCount = pdevice->rad_info.num_rings[RING_COMPUTE],
                                .timestampValidBits = 64,
                                .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
                        };

diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index ba464dea88468ed59be5016517e2d9f3e1600aec..339578d1a3385e2853af018963aa9ad01e774b99 100644 (file)
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -69,15 +69,6 @@ enum radeon_bo_usage { /* bitfield */
        RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE
 };
 
-enum ring_type {
-       RING_GFX = 0,
-       RING_COMPUTE,
-       RING_DMA,
-       RING_UVD,
-       RING_VCE,
-       RING_LAST,
-};
-
 enum radeon_ctx_priority {
        RADEON_CTX_PRIORITY_INVALID = -1,
        RADEON_CTX_PRIORITY_LOW = 0,

diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
index 934caf17d25bb1e89f11ed4e306a8919bfb025f7..a77508faf94fc412ac875b048626c3f9608611a9 100644 (file)
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
@@ -62,8 +62,8 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
                return false;
        }
 
-       ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, MAX_RINGS_PER_TYPE);
-       ws->info.num_compute_rings = MIN2(ws->info.num_compute_rings, MAX_RINGS_PER_TYPE);
+       ws->info.num_rings[RING_DMA] = MIN2(ws->info.num_rings[RING_DMA], MAX_RINGS_PER_TYPE);
+       ws->info.num_rings[RING_COMPUTE] = MIN2(ws->info.num_rings[RING_COMPUTE], MAX_RINGS_PER_TYPE);
 
        ws->use_ib_bos = ws->info.chip_class >= GFX7;
        return true;

diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c
index 486e503422efcd61518969600f242ff7ce2df377..b2b832903d31f434877e0e489b8e02ded05ba4d7 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe_common.c
+++ b/src/gallium/drivers/r600/r600_pipe_common.c
@@ -635,7 +635,7 @@ bool r600_common_context_init(struct r600_common_context *rctx,
        if (!rctx->ctx)
                return false;
 
-       if (rscreen->info.num_sdma_rings && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) {
+       if (rscreen->info.num_rings[RING_DMA] && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) {
                rctx->dma.cs = rctx->ws->cs_create(rctx->ctx, RING_DMA,
                                                   r600_flush_dma_ring,
                                                   rctx, false);
@@ -1268,8 +1268,8 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
                printf("r600_has_virtual_memory = %i\n", rscreen->info.r600_has_virtual_memory);
                printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2);
                printf("has_hw_decode = %u\n", rscreen->info.has_hw_decode);
-               printf("num_sdma_rings = %i\n", rscreen->info.num_sdma_rings);
-               printf("num_compute_rings = %u\n", rscreen->info.num_compute_rings);
+               printf("num_rings[RING_DMA] = %i\n", rscreen->info.num_rings[RING_DMA]);
+               printf("num_rings[RING_COMPUTE] = %u\n", rscreen->info.num_rings[RING_COMPUTE]);
                printf("uvd_fw_version = %u\n", rscreen->info.uvd_fw_version);
                printf("vce_fw_version = %u\n", rscreen->info.vce_fw_version);
                printf("me_fw_version = %i\n", rscreen->info.me_fw_version);

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 31eed8f5300f084297c1c8efd2bb1b067cafc14c..5fef2d11016c92bc5ab656a26da22360919ac1f3 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -99,19 +99,6 @@ enum radeon_transfer_flags {
 
 #define RADEON_SPARSE_PAGE_SIZE (64 * 1024)
 
-enum ring_type {
-    RING_GFX = 0,
-    RING_COMPUTE,
-    RING_DMA,
-    RING_UVD,
-    RING_VCE,
-    RING_UVD_ENC,
-    RING_VCN_DEC,
-    RING_VCN_ENC,
-    RING_VCN_JPEG,
-    RING_LAST,
-};
-
 enum radeon_value_id {
     RADEON_REQUESTED_VRAM_MEMORY,
     RADEON_REQUESTED_GTT_MEMORY,

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 1be3db4602bb9a64663f205cd08ba6dbeb91de7f..1338d657599b0fcc9b72a1e3b779db07208ced55 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -483,7 +483,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
        if (!sctx->ctx)
                goto fail;
 
-       if (sscreen->info.num_sdma_rings &&
+       if (sscreen->info.num_rings[RING_DMA] &&
            !(sscreen->debug_flags & DBG(NO_ASYNC_DMA)) &&
            /* SDMA timeouts sometimes on gfx10 so disable it for now. See:
             *    https://bugs.freedesktop.org/show_bug.cgi?id=111481

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 36d506b4928099512be65e5bfcd7dbc31fe1db6f..0177fe110c2676ea777611a53df3f17f6d8dddbb 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -304,10 +304,10 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
     }
 
     /* Check for dma */
-    ws->info.num_sdma_rings = 0;
+    ws->info.num_rings[RING_DMA] = 0;
     /* DMA is disabled on R700. There is IB corruption and hangs. */
     if (ws->info.chip_class >= EVERGREEN && ws->info.drm_minor >= 27) {
-        ws->info.num_sdma_rings = 1;
+        ws->info.num_rings[RING_DMA] = 1;
     }
 
     /* Check for UVD and VCE */