Added English language description for lbzupsx instruction

diff --git a/openpower/isa/pifixedloadshift.mdwn b/openpower/isa/pifixedloadshift.mdwn
index 1572acc7d445d33dd3e0d7074cdd3652b2beb3b5..ad19d70a1ba660923337ef28a97a27aa2ba28b7e 100644 (file)
--- a/openpower/isa/pifixedloadshift.mdwn
+++ b/openpower/isa/pifixedloadshift.mdwn
@@ -15,17 +15,18 @@
 
 X-Form
 
-* lbzupsx RT,RA,RB
+* lbzupsx RT,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA)
+    EA <- (RA)<<(SH+1)
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
     RA <- (RA) + (RB)
 
 Description:
 
-    Let the effective address (EA) be register RA.
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and the contents of register RA.
 
     The byte in storage addressed by EA is loaded into RT[56:63]. 
     RT[0:55] are set to 0.