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re PR target/57224 (Remove __builtin_ia32_cmpngtss and __builtin_ia32_cmpngess)
authorMarc Glisse <marc.glisse@inria.fr>
Thu, 27 Jun 2013 20:07:32 +0000 (22:07 +0200)
committerMarc Glisse <glisse@gcc.gnu.org>
Thu, 27 Jun 2013 20:07:32 +0000 (20:07 +0000)
2013-06-27  Marc Glisse  <marc.glisse@inria.fr>

PR target/57224
* config/i386/i386.c (enum ix86_builtins, bdesc_args): Remove
IX86_BUILTIN_CMPNGTSS and IX86_BUILTIN_CMPNGESS.

From-SVN: r200492

gcc/ChangeLog patch | blob | history
gcc/config/i386/i386.c patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 367fcce526b57865376281c359653eee5d04988f..cf8a04020b81bb5c502a84eb66b2ab262176efe0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-06-27  Marc Glisse  <marc.glisse@inria.fr>
+
+       PR target/57224
+       * config/i386/i386.c (enum ix86_builtins, bdesc_args): Remove
+       IX86_BUILTIN_CMPNGTSS and IX86_BUILTIN_CMPNGESS.
+
 2013-06-27  Catherine Moore <clm@codesourcery.com>
 
        * config/mips/mips-tables.opt: Regenerate.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e4799b6115035968796e321dd017763c0cbd36bf..2a65fc2a6de800659a7c0a02bb2d55b2950c47fb 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -25921,8 +25921,6 @@ enum ix86_builtins
   IX86_BUILTIN_CMPNEQSS,
   IX86_BUILTIN_CMPNLTSS,
   IX86_BUILTIN_CMPNLESS,
-  IX86_BUILTIN_CMPNGTSS,
-  IX86_BUILTIN_CMPNGESS,
   IX86_BUILTIN_CMPORDSS,
   IX86_BUILTIN_CMPUNORDSS,
 
@@ -27559,8 +27557,6 @@ static const struct builtin_description bdesc_args[] =
   { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpneqss", IX86_BUILTIN_CMPNEQSS, NE, (int) V4SF_FTYPE_V4SF_V4SF },
   { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpnltss", IX86_BUILTIN_CMPNLTSS, UNGE, (int) V4SF_FTYPE_V4SF_V4SF },
   { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpnless", IX86_BUILTIN_CMPNLESS, UNGT, (int) V4SF_FTYPE_V4SF_V4SF },
-  { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpngtss", IX86_BUILTIN_CMPNGTSS, UNGE, (int) V4SF_FTYPE_V4SF_V4SF_SWAP },
-  { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpngess", IX86_BUILTIN_CMPNGESS, UNGT, (int) V4SF_FTYPE_V4SF_V4SF_SWAP },
   { OPTION_MASK_ISA_SSE, CODE_FOR_sse_vmmaskcmpv4sf3, "__builtin_ia32_cmpordss", IX86_BUILTIN_CMPORDSS, ORDERED, (int) V4SF_FTYPE_V4SF_V4SF },
 
   { OPTION_MASK_ISA_SSE, CODE_FOR_sminv4sf3, "__builtin_ia32_minps", IX86_BUILTIN_MINPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF },