Added English Language description for stmw instruction

diff --git a/openpower/isa/fixedstore.mdwn b/openpower/isa/fixedstore.mdwn
index 452b0bfec8e75c46392f24fe061f00f24e2bed9f..3fc3fec8a97d73ae9c7d6fc1fbd34b8a559871ff 100644 (file)
--- a/openpower/isa/fixedstore.mdwn
+++ b/openpower/isa/fixedstore.mdwn
@@ -559,6 +559,18 @@ Pseudo-code:
         r <-  r + 1
         EA <-  EA + 4
 
+Description:
+
+    Let n = (32-RS). Let the effective address (EA) be the
+    sum (RA|0)+ D.
+
+    n consecutive words starting at EA are stored from the
+    low-order 32 bits of GPRs RS through 31.
+
+    This instruction is not supported in Little-Endian mode.
+    If it is executed in Little-Endian mode, the system align-
+    ment error handler is invoked.
+
 Special Registers Altered:
 
     None