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Added brackets for lwax instruction
authorShriya Sharma <shriya@redsemiconductor.com>
Tue, 26 Sep 2023 11:03:33 +0000 (12:03 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 22 Dec 2023 19:26:21 +0000 (19:26 +0000)
openpower/isa/fixedload.mdwn patch | blob | history

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 5d3703ae125028a6d27092957b1233ae57a7df14..02553435f4a0a9d8c564a13d278b64e323c22c87 100644 (file)
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -452,7 +452,7 @@ Description:
 
     Let the effective address (EA) be the sum
     (RA|0)+ (RB). The word in storage addressed by EA is
-    loaded into RT 32:63 . RT 0:31 are filled with a copy of bit 0
+    loaded into RT[32:63] . RT[0:31] are filled with a copy of bit 0
     of the loaded word.
 
 Special Registers Altered: