misc,sim: Fixed std::array bracket compiler error

For versions of Clang before 6.0, Clang returns an error if and
std::array initialization is not encompassed in two sets of
encompassing braces. This is a known compiler bug:
https://bugs.llvm.org/show_bug.cgi?id=21629.

As we support Clang 3.9 onwards, we are required to include these
redundant braces to ensure compilation. They do not produce any
ill-effects when using later clang compilers or with any GCC compiler
gem5 presently supports.

Change-Id: Ia512a9b9f583b1cfa28f9fc4c24f6e202e46b4cb
Issue-on: https://gem5.atlassian.net/browse/GEM5-563
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29294
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc
index 7711a86c0a458ef08e2c994c9cd860696cc280a0..a7a4d2ab91757237d6e40837e01ad9928c6a0c14 100644 (file)
--- a/src/arch/arm/semihosting.cc
+++ b/src/arch/arm/semihosting.cc
@@ -581,10 +581,10 @@ ArmSemihosting::callHeapInfo32(ThreadContext *tc, Addr block_addr)
     uint64_t heap_base, heap_limit, stack_base, stack_limit;
     gatherHeapInfo(tc, false, heap_base, heap_limit, stack_base, stack_limit);
 
-    std::array<uint32_t, 4> block = {
+    std::array<uint32_t, 4> block = {{
         (uint32_t)heap_base, (uint32_t)heap_limit,
         (uint32_t)stack_base, (uint32_t)stack_limit
-    };
+    }};
     portProxy(tc).write(block_addr, block, ArmISA::byteOrder(tc));
 
     return retOK(0);
@@ -596,9 +596,9 @@ ArmSemihosting::callHeapInfo64(ThreadContext *tc, Addr block_addr)
     uint64_t heap_base, heap_limit, stack_base, stack_limit;
     gatherHeapInfo(tc, true, heap_base, heap_limit, stack_base, stack_limit);
 
-    std::array<uint64_t, 4> block = {
+    std::array<uint64_t, 4> block = {{
         heap_base, heap_limit, stack_base, stack_limit
-    };
+    }};
     portProxy(tc).write(block_addr, block, ArmISA::byteOrder(tc));
 
     return retOK(0);

diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index b11a5a4436457518e211d56a62fcbd0148fe076a..203afc0878d298929f4fb307dc73c4e5ebed9715 100644 (file)
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -285,7 +285,7 @@ initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
     char key[len];
     memset(key, '\0', len);
 
-    std::array<uint64_t, 2> key_regs = { key_str1, key_str2 };
+    std::array<uint64_t, 2> key_regs = {{ key_str1, key_str2 }};
     key_regs = letoh(key_regs);
     memcpy(key, key_regs.data(), sizeof(key_regs));