arch-arm: HVC instruction undefined in secure EL1

Since EL2 is not available in secure mode, any HVC call from secure mode
should be treated as undefined. This behaviour was implemented in
aarch32 HVC but not in 64 bit version

Change-Id: Ibaa4d8b1e8fe01d2ba3ef07494c09a4d3e7e87b0
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5921
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa
index 58f08f51eafa7c1db50a9129ace99ad8ceae540a..00724c095d9c79d3b3f28c45cde6d44c93050c63 100644 (file)
--- a/src/arch/arm/isa/insts/misc64.isa
+++ b/src/arch/arm/isa/insts/misc64.isa
@@ -53,7 +53,7 @@ let {{
     SCR scr = Scr64;
 
     if (!ArmSystem::haveVirtualization(xc->tcBase()) ||
-        (ArmSystem::haveSecurity(xc->tcBase()) && !scr.hce)) {
+        (ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) {
         fault = disabledFault();
     } else {
         fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5));