i965: Change intel_batchbuffer_reloc() into brw_emit_reloc().

This renames intel_batchbuffer_reloc to brw_emit_reloc and changes the
parameter naming and ordering to match drm_intel_bo_emit_reloc().

For now, it's a trivial wrapper that accesses batch->bo.  When we
rework relocations, it will start doing actual work.

target_offset should be expanded to a uint64_t to match the kernel,
but for now we leave it as its original 32-bit type.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>

diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index a7d5bed85f7984a4cf4d5074dca9eeaf26c48aeb..bdbce589a638bbebec0611f88a0c0236de4f1a6b 100644 (file)
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -55,10 +55,10 @@ blorp_emit_reloc(struct blorp_batch *batch,
    struct brw_context *brw = batch->driver_batch;
 
    uint32_t offset = (char *)location - (char *)brw->batch.map;
-   return intel_batchbuffer_reloc(&brw->batch, address.buffer, offset,
-                                  address.read_domains,
-                                  address.write_domain,
-                                  address.offset + delta);
+   return brw_emit_reloc(&brw->batch, offset,
+                         address.buffer, address.offset + delta,
+                         address.read_domains,
+                         address.write_domain);
 }
 
 static void

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index c81ad3bb401e5c4e1e57ae80959dd2b64e4d7300..ff154cce1c50b5bc8bdbcfc8130269d249484d80 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -580,16 +580,15 @@ _intel_batchbuffer_flush_fence(struct brw_context *brw,
 /*  This is the only way buffers get added to the validate list.
  */
 uint64_t
-intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
-                        drm_bacon_bo *buffer, uint32_t offset,
-                        uint32_t read_domains, uint32_t write_domain,
-                        uint32_t delta)
+brw_emit_reloc(struct intel_batchbuffer *batch, uint32_t batch_offset,
+               drm_bacon_bo *target, uint32_t target_offset,
+               uint32_t read_domains, uint32_t write_domain)
 {
    int ret;
 
-   ret = drm_bacon_bo_emit_reloc(batch->bo, offset,
-                                buffer, delta,
-                                read_domains, write_domain);
+   ret = drm_bacon_bo_emit_reloc(batch->bo, batch_offset,
+                                 target, target_offset,
+                                 read_domains, write_domain);
    assert(ret == 0);
    (void)ret;
 
@@ -597,7 +596,7 @@ intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
     * case the buffer doesn't move and we can short-circuit the relocation
     * processing in the kernel
     */
-   return buffer->offset64 + delta;
+   return target->offset64 + target_offset;
 }
 
 void

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index 61b4fef3e3c72a4969a18cff00674f2e2a35e45f..d5f0fc025b76c38a96ef105210022e279db9916a 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -65,12 +65,9 @@ void intel_batchbuffer_data(struct brw_context *brw,
                             const void *data, GLuint bytes,
                             enum brw_gpu_ring ring);
 
-uint64_t intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
-                                 drm_bacon_bo *buffer,
-                                 uint32_t offset,
-                                 uint32_t read_domains,
-                                 uint32_t write_domain,
-                                 uint32_t delta);
+uint64_t brw_emit_reloc(struct intel_batchbuffer *batch, uint32_t batch_offset,
+                        drm_bacon_bo *target, uint32_t target_offset,
+                        uint32_t read_domains, uint32_t write_domain);
 
 #define USED_BATCH(batch) ((uintptr_t)((batch).map_next - (batch).map))
 
@@ -159,8 +156,8 @@ intel_batchbuffer_advance(struct brw_context *brw)
 #define OUT_RELOC(buf, read_domains, write_domain, delta) do {          \
    uint32_t __offset = (__map - brw->batch.map) * 4;                    \
    uint32_t reloc =                                                     \
-      intel_batchbuffer_reloc(&brw->batch, (buf), __offset,             \
-                              (read_domains), (write_domain), (delta)); \
+      brw_emit_reloc(&brw->batch, __offset, (buf), (delta),             \
+                     (read_domains), (write_domain));                   \
    OUT_BATCH(reloc);                                                    \
 } while (0)
 
@@ -168,8 +165,8 @@ intel_batchbuffer_advance(struct brw_context *brw)
 #define OUT_RELOC64(buf, read_domains, write_domain, delta) do {        \
    uint32_t __offset = (__map - brw->batch.map) * 4;                    \
    uint64_t reloc64 =                                                   \
-      intel_batchbuffer_reloc(&brw->batch, (buf), __offset,             \
-                              (read_domains), (write_domain), (delta)); \
+      brw_emit_reloc(&brw->batch, __offset, (buf), (delta),             \
+                     (read_domains), (write_domain));                   \
    OUT_BATCH(reloc64);                                                  \
    OUT_BATCH(reloc64 >> 32);                                            \
 } while (0)