struct pipe_draw_info info = *dinfo;
struct pipe_index_buffer ib = {};
struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
- bool render_cond_bit = rctx->b.current_render_cond && !rctx->b.render_cond_force_off;
+ bool render_cond_bit = rctx->b.render_cond && !rctx->b.render_cond_force_off;
uint64_t mask;
if (!info.indirect && !info.count && (info.indexed || !info.count_from_stream_output)) {
/* Render condition. */
struct r600_atom render_cond_atom;
- struct pipe_query *current_render_cond;
- unsigned current_render_cond_mode;
- boolean current_render_cond_cond;
+ struct pipe_query *render_cond;
+ unsigned render_cond_mode;
+ boolean render_cond_invert;
bool render_cond_force_off; /* for u_blitter */
/* MSAA sample locations.
struct r600_atom *atom)
{
struct radeon_winsys_cs *cs = ctx->gfx.cs;
- struct r600_query *query = (struct r600_query*)ctx->current_render_cond;
+ struct r600_query *query = (struct r600_query*)ctx->render_cond;
struct r600_query_buffer *qbuf;
uint32_t op;
bool flag_wait;
if (!query)
return;
- flag_wait = ctx->current_render_cond_mode == PIPE_RENDER_COND_WAIT ||
- ctx->current_render_cond_mode == PIPE_RENDER_COND_BY_REGION_WAIT;
+ flag_wait = ctx->render_cond_mode == PIPE_RENDER_COND_WAIT ||
+ ctx->render_cond_mode == PIPE_RENDER_COND_BY_REGION_WAIT;
switch (query->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
}
/* if true then invert, see GL_ARB_conditional_render_inverted */
- if (ctx->current_render_cond_cond)
+ if (ctx->render_cond_invert)
op |= PREDICATION_DRAW_NOT_VISIBLE; /* Draw if not visable/overflow */
else
op |= PREDICATION_DRAW_VISIBLE; /* Draw if visable/overflow */
struct r600_query_buffer *qbuf;
struct r600_atom *atom = &rctx->render_cond_atom;
- rctx->current_render_cond = query;
- rctx->current_render_cond_cond = condition;
- rctx->current_render_cond_mode = mode;
+ rctx->render_cond = query;
+ rctx->render_cond_invert = condition;
+ rctx->render_cond_mode = mode;
/* Compute the size of SET_PREDICATION packets. */
atom->num_dw = 0;
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
unsigned sh_base_reg = sctx->shader_userdata.sh_base[PIPE_SHADER_VERTEX];
- bool render_cond_bit = sctx->b.current_render_cond && !sctx->b.render_cond_force_off;
+ bool render_cond_bit = sctx->b.render_cond && !sctx->b.render_cond_force_off;
if (info->count_from_stream_output) {
struct r600_so_target *t =