gallium/radeon: shorten render_cond variable names
authorMarek Olšák <marek.olsak@amd.com>
Sat, 7 Nov 2015 15:30:01 +0000 (16:30 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 13 Nov 2015 18:54:42 +0000 (19:54 +0100)
and ..._cond -> ..._invert

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/r600/r600_state_common.c
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeon/r600_query.c
src/gallium/drivers/radeon/r600_texture.c
src/gallium/drivers/radeonsi/si_state_draw.c

index 5cf520899cf040cafb57844006ebe55b301a3ad4..d629194ca6e8285d4a8d4fb970e0433451da2d7e 100644 (file)
@@ -1478,7 +1478,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
        struct pipe_draw_info info = *dinfo;
        struct pipe_index_buffer ib = {};
        struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
-       bool render_cond_bit = rctx->b.current_render_cond && !rctx->b.render_cond_force_off;
+       bool render_cond_bit = rctx->b.render_cond && !rctx->b.render_cond_force_off;
        uint64_t mask;
 
        if (!info.indirect && !info.count && (info.indexed || !info.count_from_stream_output)) {
index ba9000f74ec2a0828e0300cc06465225b2d92750..ebe633b91250385e031ca2266b8b53b273950f7b 100644 (file)
@@ -418,9 +418,9 @@ struct r600_common_context {
 
        /* Render condition. */
        struct r600_atom                render_cond_atom;
-       struct pipe_query               *current_render_cond;
-       unsigned                        current_render_cond_mode;
-       boolean                         current_render_cond_cond;
+       struct pipe_query               *render_cond;
+       unsigned                        render_cond_mode;
+       boolean                         render_cond_invert;
        bool                            render_cond_force_off; /* for u_blitter */
 
        /* MSAA sample locations.
index 9f92587a54b4de9c1efcf2d783bf145a1856bee4..8c2b601a96ce82d3db0713ea6aa5a6c7a22f9d88 100644 (file)
@@ -307,7 +307,7 @@ static void r600_emit_query_predication(struct r600_common_context *ctx,
                                        struct r600_atom *atom)
 {
        struct radeon_winsys_cs *cs = ctx->gfx.cs;
-       struct r600_query *query = (struct r600_query*)ctx->current_render_cond;
+       struct r600_query *query = (struct r600_query*)ctx->render_cond;
        struct r600_query_buffer *qbuf;
        uint32_t op;
        bool flag_wait;
@@ -315,8 +315,8 @@ static void r600_emit_query_predication(struct r600_common_context *ctx,
        if (!query)
                return;
 
-       flag_wait = ctx->current_render_cond_mode == PIPE_RENDER_COND_WAIT ||
-                   ctx->current_render_cond_mode == PIPE_RENDER_COND_BY_REGION_WAIT;
+       flag_wait = ctx->render_cond_mode == PIPE_RENDER_COND_WAIT ||
+                   ctx->render_cond_mode == PIPE_RENDER_COND_BY_REGION_WAIT;
 
        switch (query->type) {
        case PIPE_QUERY_OCCLUSION_COUNTER:
@@ -335,7 +335,7 @@ static void r600_emit_query_predication(struct r600_common_context *ctx,
        }
 
        /* if true then invert, see GL_ARB_conditional_render_inverted */
-       if (ctx->current_render_cond_cond)
+       if (ctx->render_cond_invert)
                op |= PREDICATION_DRAW_NOT_VISIBLE; /* Draw if not visable/overflow */
        else
                op |= PREDICATION_DRAW_VISIBLE; /* Draw if visable/overflow */
@@ -831,9 +831,9 @@ static void r600_render_condition(struct pipe_context *ctx,
        struct r600_query_buffer *qbuf;
        struct r600_atom *atom = &rctx->render_cond_atom;
 
-       rctx->current_render_cond = query;
-       rctx->current_render_cond_cond = condition;
-       rctx->current_render_cond_mode = mode;
+       rctx->render_cond = query;
+       rctx->render_cond_invert = condition;
+       rctx->render_cond_mode = mode;
 
        /* Compute the size of SET_PREDICATION packets. */
        atom->num_dw = 0;
index edfdfe33187a09a730b876683959d250b2a1a193..3126cce8c2241a86805e03753703d15b334b2af6 100644 (file)
@@ -1324,7 +1324,7 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
 {
        int i;
 
-       if (rctx->current_render_cond)
+       if (rctx->render_cond)
                return;
 
        for (i = 0; i < fb->nr_cbufs; i++) {
index 79e88765d045ac8bcde26071faa334b87bee5800..753abc8c1034552e65d75636e77c1b25904d0b47 100644 (file)
@@ -457,7 +457,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
 {
        struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
        unsigned sh_base_reg = sctx->shader_userdata.sh_base[PIPE_SHADER_VERTEX];
-       bool render_cond_bit = sctx->b.current_render_cond && !sctx->b.render_cond_force_off;
+       bool render_cond_bit = sctx->b.render_cond && !sctx->b.render_cond_force_off;
 
        if (info->count_from_stream_output) {
                struct r600_so_target *t =