arch-arm: Early checking if debug is enabled in TLB

The patch is aiming at speeding up gem5 execution.  The TLB::translateFs
is in the critical path of the simulator: every fetch + ld/st will make
use of it.
Checking all the time for a breakpoint during fetch is rather expensive;
it is better to make use of the cached booleans in SelfDebug to do an
early check to see if any of
Watchpoint/Breakpopint/VectorCatch/SoftwareStep is enabled.
Most workloads won't use them so there's no point on calling the
testDebug method

Change-Id: I0189b84e0dc2e081acce04ff44787b9f1014477c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32776
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index e8bb718050a0d74576c37294426deef90bc626f7..28534ee17550cfb8b8d657340871083ac688b0a1 100644 (file)
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1233,10 +1233,10 @@ TLB::translateFs(const RequestPtr &req, ThreadContext *tc, Mode mode,
                                functional, vaddr, tranMethod);
     }
 
-    //Check for Debug Exceptions
-    if (fault == NoFault) {
-        SelfDebug *sd = ArmISA::ISA::getSelfDebug(tc);
+    // Check for Debug Exceptions
+    SelfDebug *sd = ArmISA::ISA::getSelfDebug(tc);
 
+    if (sd->enabled() && fault == NoFault) {
         fault = sd->testDebug(tc, req, mode);
     }