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Do not run xilinx_dsp_cascadeAB for now
author
Eddie Hung
<eddie@fpgeh.com>
Fri, 20 Sep 2019 19:18:37 +0000
(12:18 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Fri, 20 Sep 2019 19:18:37 +0000
(12:18 -0700)
passes/pmgen/xilinx_dsp.cc
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diff --git
a/passes/pmgen/xilinx_dsp.cc
b/passes/pmgen/xilinx_dsp.cc
index 7530eb5ad609886c12fbfc669c4d6915658e50fb..4790cc69d447c5b533cf26c0b919f892d06bca06 100644
(file)
--- a/
passes/pmgen/xilinx_dsp.cc
+++ b/
passes/pmgen/xilinx_dsp.cc
@@
-551,7
+551,8
@@
struct XilinxDspPass : public Pass {
did_something = false;
xilinx_dsp_cascade_pm pmc(module, module->selected_cells());
pmc.run_xilinx_dsp_cascadeP();
- pmc.run_xilinx_dsp_cascadeAB();
+ //pmc.run_xilinx_dsp_cascadeAB();
+ break;
} while (did_something);
}
}