(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 2b47344fca6cbdc43cd0803477bf1690420cfd4c..e6b4e4aa5732a0717dd702abc30eeac157b517c1 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -254,7 +254,9 @@ gives the base concept, but in 1994 it was Peter Hsu, the designer
 of the MIPS R8000, who first came up with the idea of Vector-augmented
 prefixing of an existing Scalar ISA.  Relying on a multi-issue Out-of-Order Execution Engine,
 the prefix would mark which of the registers were to be treated as
-Scalar and which as Vector, then perform a `REP`-like loop that
+Scalar and which as Vector, then, treating the Scalar "suffix" instruction
+as a guide and making "scalar instruction" synonymous with "Vector element",
+perform a `REP`-like loop that
 jammed multiple scalar operations into the Multi-Issue Execution
 Engine.  The only reason that the team did not take this forward
 into a commercial product