radeonsi: add R600_DEBUG=nofmask to disable MSAA compression

For testing.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 79419036665374fd521a3b268b80ad5ef305e2c6..4df039d33a4af5572543452db360a42d36915a10 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -110,6 +110,7 @@ enum {
        DBG_NO_DCC_FB,
        DBG_NO_DCC_MSAA,
        DBG_DCC_MSAA,
+       DBG_NO_FMASK,
 
        /* Tests: */
        DBG_TEST_DMA,

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 50c5dbe3e1a83359710863165778864b0f6e3f26..ae9623a829db5504b3a488a76ba52264f583d9ea 100644 (file)
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1268,12 +1268,13 @@ r600_texture_create_object(struct pipe_screen *screen,
                                r600_texture_allocate_htile(sscreen, rtex);
                }
        } else {
-               if (base->nr_samples > 1) {
-                       if (!buf) {
-                               r600_texture_allocate_fmask(sscreen, rtex);
-                               r600_texture_allocate_cmask(sscreen, rtex);
-                               rtex->cmask_buffer = &rtex->resource;
-                       }
+               if (base->nr_samples > 1 &&
+                   !buf &&
+                   !(sscreen->debug_flags & DBG(NO_FMASK))) {
+                       r600_texture_allocate_fmask(sscreen, rtex);
+                       r600_texture_allocate_cmask(sscreen, rtex);
+                       rtex->cmask_buffer = &rtex->resource;
+
                        if (!rtex->fmask.size || !rtex->cmask.size) {
                                FREE(rtex);
                                return NULL;

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 1cc08c5feedb9642d0565f805c69c08841c6f8b8..cbc8689044b07f45c98167f1e1f8d821a9bd9222 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -88,6 +88,7 @@ static const struct debug_named_value debug_options[] = {
        { "nodccfb", DBG(NO_DCC_FB), "Disable separate DCC on the main framebuffer" },
        { "nodccmsaa", DBG(NO_DCC_MSAA), "Disable DCC for MSAA" },
        { "dccmsaa", DBG(DCC_MSAA), "Enable DCC for MSAA" },
+       { "nofmask", DBG(NO_FMASK), "Disable MSAA compression" },
 
        /* Tests: */
        { "testdma", DBG(TEST_DMA), "Invoke SDMA tests and exit." },

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 2053dcb9fcd9ce2ef9e27237fe22ebba016324e5..dbb04ed7e45f7f08978bf1dfbd5b88e37889945c 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -285,6 +285,7 @@ struct si_framebuffer {
        ubyte                           nr_samples:5; /* at most 16xAA */
        ubyte                           log_samples:3; /* at most 4 = 16xAA */
        ubyte                           compressed_cb_mask;
+       ubyte                           uncompressed_cb_mask;
        ubyte                           color_is_int8;
        ubyte                           color_is_int10;
        ubyte                           dirty_cbufs;

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index b4165a4669b7d7c77ce2da1ae2cf2319d627af6f..c9ed7256f04a33cd4fd68633c51fdb53d6ba943d 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2784,8 +2784,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
         *
         * Only flush and wait for CB if there is actually a bound color buffer.
         */
-       if (sctx->framebuffer.nr_samples <= 1 &&
-           sctx->framebuffer.state.nr_cbufs)
+       if (sctx->framebuffer.uncompressed_cb_mask)
                si_make_CB_shader_coherent(sctx, sctx->framebuffer.nr_samples,
                                           sctx->framebuffer.CB_has_shader_readable_metadata);
 
@@ -2829,6 +2828,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
        sctx->framebuffer.color_is_int10 = 0;
 
        sctx->framebuffer.compressed_cb_mask = 0;
+       sctx->framebuffer.uncompressed_cb_mask = 0;
        sctx->framebuffer.nr_samples = util_framebuffer_get_num_samples(state);
        sctx->framebuffer.log_samples = util_logbase2(sctx->framebuffer.nr_samples);
        sctx->framebuffer.any_dst_linear = false;
@@ -2861,9 +2861,10 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
                if (surf->color_is_int10)
                        sctx->framebuffer.color_is_int10 |= 1 << i;
 
-               if (rtex->fmask.size) {
+               if (rtex->fmask.size)
                        sctx->framebuffer.compressed_cb_mask |= 1 << i;
-               }
+               else
+                       sctx->framebuffer.uncompressed_cb_mask |= 1 << i;
 
                if (rtex->surface.is_linear)
                        sctx->framebuffer.any_dst_linear = true;
@@ -4449,8 +4450,7 @@ static void si_texture_barrier(struct pipe_context *ctx, unsigned flags)
        si_update_fb_dirtiness_after_rendering(sctx);
 
        /* Multisample surfaces are flushed in si_decompress_textures. */
-       if (sctx->framebuffer.nr_samples <= 1 &&
-           sctx->framebuffer.state.nr_cbufs)
+       if (sctx->framebuffer.uncompressed_cb_mask)
                si_make_CB_shader_coherent(sctx, sctx->framebuffer.nr_samples,
                                           sctx->framebuffer.CB_has_shader_readable_metadata);
 }
@@ -4493,8 +4493,7 @@ static void si_memory_barrier(struct pipe_context *ctx, unsigned flags)
         * si_decompress_textures when needed.
         */
        if (flags & PIPE_BARRIER_FRAMEBUFFER &&
-           sctx->framebuffer.nr_samples <= 1 &&
-           sctx->framebuffer.state.nr_cbufs) {
+           sctx->framebuffer.uncompressed_cb_mask) {
                sctx->b.flags |= SI_CONTEXT_FLUSH_AND_INV_CB;
 
                if (sctx->b.chip_class <= VI)