re PR middle-end/19697 (gcc.c-torture/execute/ieee/mzero6.c:24: error: unrecognizable...

	PR middle-end/19697
	* config/pa/pa.md (anddi3, iordi3): On HPPA64, disallow an integer
	constant as the second operand and a register as the third.

From-SVN: r94468

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e66f1f8a768d6a80c4c28166794825ae721f9697..79a2feb986eb38e672a761d6a9e74e0e6f961bf2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-01-30  Roger Sayle  <roger@eyesopen.com>
+
+       PR middle-end/19697
+       * config/pa/pa.md (anddi3, iordi3): On HPPA64, disallow an integer
+       constant as the second operand and a register as the third.
+
 2005-01-31  Danny Smith  <dannysmith@users.sourceforge.net>
 
        PR target/19704

diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index cb88288db05b55e0cb62a4c8370779ddb50519cf..9a434a6095f8062cc6b225445b032468a6553759 100644 (file)
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -5441,25 +5441,14 @@
 
 (define_expand "anddi3"
   [(set (match_operand:DI 0 "register_operand" "")
-       (and:DI (match_operand:DI 1 "and_operand" "")
+       (and:DI (match_operand:DI 1 "register_operand" "")
                (match_operand:DI 2 "and_operand" "")))]
   ""
   "
 {
-  if (TARGET_64BIT)
-    {
-      /* One operand must be a register operand.  */
-      if (!register_operand (operands[1], DImode)
-         && !register_operand (operands[2], DImode))
-       FAIL;
-    }
-  else
-    {
-      /* Both operands must be register operands.  */
-      if (!register_operand (operands[1], DImode)
-         || !register_operand (operands[2], DImode))
-       FAIL;
-    }
+  /* Both operands must be register operands.  */
+  if (!TARGET_64BIT && !register_operand (operands[2], DImode))
+    FAIL;
 }")
 
 (define_insn ""
@@ -5520,25 +5509,14 @@
 
 (define_expand "iordi3"
   [(set (match_operand:DI 0 "register_operand" "")
-       (ior:DI (match_operand:DI 1 "ior_operand" "")
+       (ior:DI (match_operand:DI 1 "register_operand" "")
                (match_operand:DI 2 "ior_operand" "")))]
   ""
   "
 {
-  if (TARGET_64BIT)
-    {
-      /* One operand must be a register operand.  */
-      if (!register_operand (operands[1], DImode)
-         && !register_operand (operands[2], DImode))
-       FAIL;
-    }
-  else
-    {
-      /* Both operands must be register operands.  */
-      if (!register_operand (operands[1], DImode)
-         || !register_operand (operands[2], DImode))
-       FAIL;
-    }
+  /* Both operands must be register operands.  */
+  if (!TARGET_64BIT && !register_operand (operands[2], DImode))
+    FAIL;
 }")
 
 (define_insn ""