Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE

2019-05-15  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/89021
	* config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
	* config/i386/sse.md (sse2_cvtpi2pd): Ditto.
	(sse2_cvtpd2pi): Ditto.
	(sse2_cvttpd2pi): Ditto.
	(*vec_concatv2sf_sse4_1): Ditto.
	(*vec_concatv2sf_sse): Ditto.
	(*vec_concatv2si_sse4_1): Ditto.
	(*vec_concatv2si): Ditto.
	(*vec_concatv4si_0): Ditto.
	(*vec_concatv2di_0): Ditto.

From-SVN: r271249

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 24babbce66cb1014cf9a40f07dd3e0e64231de9f..206281dcd0a6a1d5415dc90119ba7dd32f75f3a7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2019-05-15  Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR target/89021
+       * config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
+       * config/i386/sse.md (sse2_cvtpi2pd): Ditto.
+       (sse2_cvtpd2pi): Ditto.
+       (sse2_cvttpd2pi): Ditto.
+       (*vec_concatv2sf_sse4_1): Ditto.
+       (*vec_concatv2sf_sse): Ditto.
+       (*vec_concatv2si_sse4_1): Ditto.
+       (*vec_concatv2si): Ditto.
+       (*vec_concatv4si_0): Ditto.
+       (*vec_concatv2di_0): Ditto.
+
 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/89021

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2ae4bb84fdf1a7b395c7719043a285886da79a39..1bc14b94cb953f1c1d48dfeab7272be33ef6d9f9 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3874,6 +3874,10 @@
              (const_string "avx512bw")
           ]
           (const_string "*")))
+   (set (attr "mmx_isa")
+     (if_then_else (eq_attr "alternative" "5,6")
+                  (const_string "native")
+                  (const_string "*")))
    (set (attr "type")
      (cond [(eq_attr "alternative" "0,1,2,4")
              (const_string "multi")

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 11875adb7810fae75fe1d7f0b4c07936ce0cb888..677e7023eb27736193815ef5a304ce277bbfc3c3 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -5394,7 +5394,8 @@
   "@
    %vcvtdq2pd\t{%1, %0|%0, %1}
    cvtpi2pd\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "mmx_isa" "*,native")
+   (set_attr "type" "ssecvt")
    (set_attr "unit" "*,mmx")
    (set_attr "prefix_data16" "*,1")
    (set_attr "prefix" "maybe_vex,*")
@@ -5408,7 +5409,8 @@
   "@
    * return TARGET_AVX ? \"vcvtpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvtpd2dq\t{%1, %0|%0, %1}\";
    cvtpd2pi\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "mmx_isa" "*,native")
+   (set_attr "type" "ssecvt")
    (set_attr "unit" "*,mmx")
    (set_attr "amdfam10_decode" "double")
    (set_attr "athlon_decode" "vector")
@@ -5424,7 +5426,8 @@
   "@
    * return TARGET_AVX ? \"vcvttpd2dq{x}\t{%1, %0|%0, %1}\" : \"cvttpd2dq\t{%1, %0|%0, %1}\";
    cvttpd2pi\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "mmx_isa" "*,native")
+   (set_attr "type" "ssecvt")
    (set_attr "unit" "*,mmx")
    (set_attr "amdfam10_decode" "double")
    (set_attr "athlon_decode" "vector")
@@ -7632,6 +7635,10 @@
              (const_string "mmxmov")
           ]
           (const_string "sselog")))
+   (set (attr "mmx_isa")
+     (if_then_else (eq_attr "alternative" "7,8")
+                  (const_string "native")
+                  (const_string "*")))
    (set (attr "prefix_data16")
      (if_then_else (eq_attr "alternative" "3,4")
                   (const_string "1")
@@ -7667,7 +7674,8 @@
    movss\t{%1, %0|%0, %1}
    punpckldq\t{%2, %0|%0, %2}
    movd\t{%1, %0|%0, %1}"
-  [(set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
+  [(set_attr "mmx_isa" "*,*,native,native")
+   (set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
    (set_attr "mode" "V4SF,SF,DI,DI")])
 
 (define_insn "*vec_concatv4sf"
@@ -14967,6 +14975,10 @@
    punpckldq\t{%2, %0|%0, %2}
    movd\t{%1, %0|%0, %1}"
   [(set_attr "isa" "noavx,noavx,avx,avx512dq,noavx,noavx,avx,*,*,*")
+   (set (attr "mmx_isa")
+     (if_then_else (eq_attr "alternative" "8,9")
+                  (const_string "native")
+                  (const_string "*")))
    (set (attr "type")
      (cond [(eq_attr "alternative" "7")
              (const_string "ssemov")
@@ -15004,6 +15016,7 @@
    punpckldq\t{%2, %0|%0, %2}
    movd\t{%1, %0|%0, %1}"
   [(set_attr "isa" "sse2,sse2,*,*,*,*")
+   (set_attr "mmx_isa" "*,*,*,*,native,native")
    (set_attr "type" "sselog,ssemov,sselog,ssemov,mmxcvt,mmxmov")
    (set_attr "mode" "TI,TI,V4SF,SF,DI,DI")])
 
@@ -15033,7 +15046,8 @@
   "@
    %vmovq\t{%1, %0|%0, %1}
    movq2dq\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssemov")
+  [(set_attr "mmx_isa" "*,native")
+   (set_attr "type" "ssemov")
    (set_attr "prefix" "maybe_vex,orig")
    (set_attr "mode" "TI")])
 
@@ -15108,6 +15122,7 @@
    %vmovq\t{%1, %0|%0, %1}
    movq2dq\t{%1, %0|%0, %1}"
   [(set_attr "isa" "x64,*,*")
+   (set_attr "mmx_isa" "*,*,native")
    (set_attr "type" "ssemov")
    (set_attr "prefix_rex" "1,*,*")
    (set_attr "prefix" "maybe_vex,maybe_vex,orig")