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Smaller default parameters in $mem simlib model
author
Clifford Wolf
<clifford@clifford.at>
Sat, 14 Feb 2015 23:20:05 +0000
(
00:20
+0100)
committer
Clifford Wolf
<clifford@clifford.at>
Sat, 14 Feb 2015 23:20:05 +0000
(
00:20
+0100)
techlibs/common/simlib.v
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diff --git
a/techlibs/common/simlib.v
b/techlibs/common/simlib.v
index ee024051b13cb33ec7fef077d09037c6cb038e39..bc343c62dddf9dc9499b51935100dc4cbc548d61 100644
(file)
--- a/
techlibs/common/simlib.v
+++ b/
techlibs/common/simlib.v
@@
-1539,9
+1539,9
@@
endmodule
module \$mem (RD_CLK, RD_ADDR, RD_DATA, WR_CLK, WR_EN, WR_ADDR, WR_DATA);
parameter MEMID = "";
-parameter SIZE =
256
;
+parameter SIZE =
4
;
parameter OFFSET = 0;
-parameter ABITS =
8
;
+parameter ABITS =
2
;
parameter WIDTH = 8;
parameter signed INIT = 1'bx;