rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't generate the XXBRD instruction.
authorMichael Meissner <meissner@linux.vnet.ibm.com>
Tue, 14 Nov 2017 23:04:27 +0000 (23:04 +0000)
committerMichael Meissner <meissner@gcc.gnu.org>
Tue, 14 Nov 2017 23:04:27 +0000 (23:04 +0000)
2017-11-14  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't
generate the XXBRD instruction.

From-SVN: r254742

gcc/ChangeLog
gcc/config/rs6000/rs6000.md

index 0acc10027a10c7fef0e3ff0023fa993ca40a9f00..15f391fb726b143e7f2a6f22079cb8226232db88 100644 (file)
@@ -1,5 +1,8 @@
 2017-11-14  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
+       * config/rs6000/rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't
+       generate the XXBRD instruction.
+
        * config/rs6000/rs6000-c.c (is_float128_p): New helper function.
        (rs6000_builtin_type_compatible): Treat _Float128 and long double
        as being compatible if -mabi=ieeelongdouble.
index 9b0f872cee3e7b97df1ffc887624bd8957e90e8c..276ad8a32e87c1b218bbfa51f8716b460ab48e91 100644 (file)
       DONE;
     }
 
-  if (TARGET_P9_VECTOR && !MEM_P (src) && !MEM_P (dest))
-    {
-      emit_insn (gen_bswapdi2_xxbrd (dest, src));
-      DONE;
-    }
-
   if (!TARGET_POWERPC64)
     {
       /* 32-bit mode needs fewer scratch registers, but 32-bit addressing mode