return 0;
}
-static void legacy_track_pending(struct bo_manager_legacy *boml, int debug)
+void legacy_track_pending(struct radeon_bo_manager *bom, int debug)
{
+ struct bo_manager_legacy *boml = (struct bo_manager_legacy*) bom;
struct bo_legacy *bo_legacy;
struct bo_legacy *next;
bo_legacy = boml->pending_bos.pnext;
while (bo_legacy) {
if (debug)
- fprintf(stderr,"pending %p %d %d %d\n", bo_legacy, bo_legacy->base.size,
- boml->current_age, bo_legacy->pending);
+ fprintf(stderr,"pending %p %d %d %d\n", bo_legacy, bo_legacy->base.size,
+ boml->current_age, bo_legacy->pending);
next = bo_legacy->pnext;
if (legacy_is_pending(&(bo_legacy->base))) {
}
if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT)
{
retry:
- legacy_track_pending(boml, 0);
+ legacy_track_pending(&boml->base, 0);
/* dma buffers */
r = bo_dma_alloc(&(bo_legacy->base));
if (r) {
pending_retry = 0;
while(boml->cpendings && pending_retry++ < 10000) {
- legacy_track_pending(boml, 0);
+ legacy_track_pending(&boml->base, 0);
retry_count++;
if (retry_count > 2) {
free(bo_legacy->tobj);
r = bo_vram_validate(bo, soffset, eoffset);
if (r) {
- legacy_track_pending(boml, 0);
+ legacy_track_pending(&boml->base, 0);
legacy_kick_all_buffers(boml);
retries++;
if (retries == 2) {
__FUNCTION__, free, wait, reserved, rmesa->dma.minimum_size);
}
+ if (!rmesa->radeonScreen->driScreen->dri2.enabled) {
+ /* request updated cs processing information from kernel */
+ legacy_track_pending(rmesa->radeonScreen->bom, 0);
+ }
/* move waiting bos to free list.
wait list provides gpu time to handle data before reuse */
foreach_s(dma_bo, temp, &rmesa->dma.wait) {