ac: change legacy_surf_level::slice_size to dword units

The next commit will reduce the size even more.

v2: typecast to uint64_t manually
v3: add more typecasts, add asserts

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index f7600a35b265b4dc1f73fa40082e8abf65ad184c..2b6c3fb013547f855187783e1e23942a6ac499da 100644 (file)
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -304,7 +304,7 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib,
 
        surf_level = is_stencil ? &surf->u.legacy.stencil_level[level] : &surf->u.legacy.level[level];
        surf_level->offset = align64(surf->surf_size, AddrSurfInfoOut->baseAlign);
-       surf_level->slice_size = AddrSurfInfoOut->sliceSize;
+       surf_level->slice_size_dw = AddrSurfInfoOut->sliceSize / 4;
        surf_level->nblk_x = AddrSurfInfoOut->pitch;
        surf_level->nblk_y = AddrSurfInfoOut->height;
 

diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h
index 1dc95cd0883a7dd1c451bcded1270b1ab0d8fe44..ec89f6b5bb912145609511203783158da517e4a4 100644 (file)
--- a/src/amd/common/ac_surface.h
+++ b/src/amd/common/ac_surface.h
@@ -71,7 +71,7 @@ enum radeon_micro_mode {
 
 struct legacy_surf_level {
     uint64_t                    offset;
-    uint64_t                    slice_size;
+    uint32_t                    slice_size_dw; /* in dwords; max = 4GB / 4. */
     uint32_t                    dcc_offset; /* relative offset within DCC mip tree */
     uint32_t                    dcc_fast_clear_size;
     uint16_t                    nblk_x;

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index b532aa916ae6b1097defa069d53c04eb0262a0a7..c241e369b9138a0d47021ed2fa5aae27571324e9 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1156,11 +1156,11 @@ void radv_GetImageSubresourceLayout(
                if (image->type == VK_IMAGE_TYPE_3D)
                        pLayout->size *= u_minify(image->info.depth, level);
        } else {
-               pLayout->offset = surface->u.legacy.level[level].offset + surface->u.legacy.level[level].slice_size * layer;
+               pLayout->offset = surface->u.legacy.level[level].offset + (uint64_t)surface->u.legacy.level[level].slice_size_dw * 4 * layer;
                pLayout->rowPitch = surface->u.legacy.level[level].nblk_x * surface->bpe;
-               pLayout->arrayPitch = surface->u.legacy.level[level].slice_size;
-               pLayout->depthPitch = surface->u.legacy.level[level].slice_size;
-               pLayout->size = surface->u.legacy.level[level].slice_size;
+               pLayout->arrayPitch = (uint64_t)surface->u.legacy.level[level].slice_size_dw * 4;
+               pLayout->depthPitch = (uint64_t)surface->u.legacy.level[level].slice_size_dw * 4;
+               pLayout->size = (uint64_t)surface->u.legacy.level[level].slice_size_dw * 4;
                if (image->type == VK_IMAGE_TYPE_3D)
                        pLayout->size *= u_minify(image->info.depth, level);
        }

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index dcbc6862832bcb8ca9ddb87127382ed3e6c9b7f4..a9982b591551c687bece779003312e34b63d5e8f 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3667,7 +3667,7 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx,
                z = src_z;
                base = rsrc->surface.u.legacy.level[src_level].offset;
                addr = rdst->surface.u.legacy.level[dst_level].offset;
-               addr += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+               addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
                addr += dst_y * pitch + dst_x * bpp;
                bank_h = eg_bank_wh(rsrc->surface.u.legacy.bankh);
                bank_w = eg_bank_wh(rsrc->surface.u.legacy.bankw);
@@ -3692,7 +3692,7 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx,
                z = dst_z;
                base = rdst->surface.u.legacy.level[dst_level].offset;
                addr = rsrc->surface.u.legacy.level[src_level].offset;
-               addr += rsrc->surface.u.legacy.level[src_level].slice_size * src_z;
+               addr += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_z;
                addr += src_y * pitch + src_x * bpp;
                bank_h = eg_bank_wh(rdst->surface.u.legacy.bankh);
                bank_w = eg_bank_wh(rdst->surface.u.legacy.bankw);
@@ -3809,10 +3809,10 @@ static void evergreen_dma_copy(struct pipe_context *ctx,
                 *   dst_pitch == src_pitch
                 */
                src_offset= rsrc->surface.u.legacy.level[src_level].offset;
-               src_offset += rsrc->surface.u.legacy.level[src_level].slice_size * src_box->z;
+               src_offset += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_box->z;
                src_offset += src_y * src_pitch + src_x * bpp;
                dst_offset = rdst->surface.u.legacy.level[dst_level].offset;
-               dst_offset += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+               dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
                dst_offset += dst_y * dst_pitch + dst_x * bpp;
                evergreen_dma_copy_buffer(rctx, dst, src, dst_offset, src_offset,
                                        src_box->height * src_pitch);

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 3102905537969784c29a2e74514b12756e7bede7..cbf860f45f6cdd788371472eae365b429e051ca1 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2881,7 +2881,7 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
                z = src_z;
                base = rsrc->surface.u.legacy.level[src_level].offset;
                addr = rdst->surface.u.legacy.level[dst_level].offset;
-               addr += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+               addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
                addr += dst_y * pitch + dst_x * bpp;
        } else {
                /* L2T */
@@ -2900,7 +2900,7 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
                z = dst_z;
                base = rdst->surface.u.legacy.level[dst_level].offset;
                addr = rsrc->surface.u.legacy.level[src_level].offset;
-               addr += rsrc->surface.u.legacy.level[src_level].slice_size * src_z;
+               addr += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_z;
                addr += src_y * pitch + src_x * bpp;
        }
        /* check that we are in dw/base alignment constraint */
@@ -3005,10 +3005,10 @@ static void r600_dma_copy(struct pipe_context *ctx,
                 *   dst_pitch == src_pitch
                 */
                src_offset= rsrc->surface.u.legacy.level[src_level].offset;
-               src_offset += rsrc->surface.u.legacy.level[src_level].slice_size * src_box->z;
+               src_offset += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_box->z;
                src_offset += src_y * src_pitch + src_x * bpp;
                dst_offset = rdst->surface.u.legacy.level[dst_level].offset;
-               dst_offset += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+               dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
                dst_offset += dst_y * dst_pitch + dst_x * bpp;
                size = src_box->height * src_pitch;
                /* must be dw aligned */

diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index f7c9b63b1126345e245e252f8f92e20c2ad34d48..07782ff8ce955840a2b7dff3a7642354a637b501 100644 (file)
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -178,7 +178,8 @@ static unsigned r600_texture_get_offset(struct r600_common_screen *rscreen,
 {
        *stride = rtex->surface.u.legacy.level[level].nblk_x *
                rtex->surface.bpe;
-       *layer_stride = rtex->surface.u.legacy.level[level].slice_size;
+       assert((uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 <= UINT_MAX);
+       *layer_stride = (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4;
 
        if (!box)
                return rtex->surface.u.legacy.level[level].offset;
@@ -186,7 +187,7 @@ static unsigned r600_texture_get_offset(struct r600_common_screen *rscreen,
        /* Each texture is an array of mipmap levels. Each level is
         * an array of slices. */
        return rtex->surface.u.legacy.level[level].offset +
-               box->z * rtex->surface.u.legacy.level[level].slice_size +
+               box->z * (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 +
                (box->y / rtex->surface.blk_h *
                 rtex->surface.u.legacy.level[level].nblk_x +
                 box->x / rtex->surface.blk_w) * rtex->surface.bpe;
@@ -256,8 +257,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
                 * for those
                 */
                surface->u.legacy.level[0].nblk_x = pitch_in_bytes_override / bpe;
-               surface->u.legacy.level[0].slice_size = pitch_in_bytes_override *
-                       surface->u.legacy.level[0].nblk_y;
+               surface->u.legacy.level[0].slice_size_dw =
+                       ((uint64_t)pitch_in_bytes_override * surface->u.legacy.level[0].nblk_y) / 4;
        }
 
        if (offset) {
@@ -502,7 +503,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
                offset = rtex->surface.u.legacy.level[0].offset;
                stride = rtex->surface.u.legacy.level[0].nblk_x *
                        rtex->surface.bpe;
-               slice_size = rtex->surface.u.legacy.level[0].slice_size;
+               slice_size = (uint64_t)rtex->surface.u.legacy.level[0].slice_size_dw * 4;
        } else {
                /* Move a suballocated buffer into a non-suballocated allocation. */
                if (rscreen->ws->buffer_is_suballocated(res->buf)) {
@@ -847,7 +848,7 @@ void r600_print_texture_info(struct r600_common_screen *rscreen,
                        "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
                        "mode=%u, tiling_index = %u\n",
                        i, rtex->surface.u.legacy.level[i].offset,
-                       rtex->surface.u.legacy.level[i].slice_size,
+                       (uint64_t)rtex->surface.u.legacy.level[i].slice_size_dw * 4,
                        u_minify(rtex->resource.b.b.width0, i),
                        u_minify(rtex->resource.b.b.height0, i),
                        u_minify(rtex->resource.b.b.depth0, i),
@@ -865,7 +866,7 @@ void r600_print_texture_info(struct r600_common_screen *rscreen,
                                "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
                                "mode=%u, tiling_index = %u\n",
                                i, rtex->surface.u.legacy.stencil_level[i].offset,
-                               rtex->surface.u.legacy.stencil_level[i].slice_size,
+                               (uint64_t)rtex->surface.u.legacy.stencil_level[i].slice_size_dw * 4,
                                u_minify(rtex->resource.b.b.width0, i),
                                u_minify(rtex->resource.b.b.height0, i),
                                u_minify(rtex->resource.b.b.depth0, i),

diff --git a/src/gallium/drivers/r600/radeon_uvd.c b/src/gallium/drivers/r600/radeon_uvd.c
index b0551d7e1e3da5efe509ed63da0699a1dcbd4851..69bba8cf6c6f53b29b9802e3f4e81d54b5958681 100644 (file)
--- a/src/gallium/drivers/r600/radeon_uvd.c
+++ b/src/gallium/drivers/r600/radeon_uvd.c
@@ -1414,7 +1414,7 @@ error:
 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
 {
        return surface->u.legacy.level[0].offset +
-               layer * surface->u.legacy.level[0].slice_size;
+               layer * (uint64_t)surface->u.legacy.level[0].slice_size_dw * 4;
 }
 
 /* hw encode the aspect of macro tiles */

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index d77b9e942d90b2da5826595344dbfa052e93ad9f..eb63cdefd1aafeed3d540a8db78e7f7b90c81f96 100644 (file)
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -199,7 +199,8 @@ static unsigned r600_texture_get_offset(struct r600_common_screen *rscreen,
        } else {
                *stride = rtex->surface.u.legacy.level[level].nblk_x *
                          rtex->surface.bpe;
-               *layer_stride = rtex->surface.u.legacy.level[level].slice_size;
+               assert((uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 <= UINT_MAX);
+               *layer_stride = (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4;
 
                if (!box)
                        return rtex->surface.u.legacy.level[level].offset;
@@ -207,7 +208,7 @@ static unsigned r600_texture_get_offset(struct r600_common_screen *rscreen,
                /* Each texture is an array of mipmap levels. Each level is
                 * an array of slices. */
                return rtex->surface.u.legacy.level[level].offset +
-                      box->z * rtex->surface.u.legacy.level[level].slice_size +
+                      box->z * (uint64_t)rtex->surface.u.legacy.level[level].slice_size_dw * 4 +
                       (box->y / rtex->surface.blk_h *
                        rtex->surface.u.legacy.level[level].nblk_x +
                        box->x / rtex->surface.blk_w) * rtex->surface.bpe;
@@ -638,7 +639,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
                        offset = rtex->surface.u.legacy.level[0].offset;
                        stride = rtex->surface.u.legacy.level[0].nblk_x *
                                 rtex->surface.bpe;
-                       slice_size = rtex->surface.u.legacy.level[0].slice_size;
+                       slice_size = (uint64_t)rtex->surface.u.legacy.level[0].slice_size_dw * 4;
                }
        } else {
                /* Move a suballocated buffer into a non-suballocated allocation. */
@@ -1066,7 +1067,7 @@ void si_print_texture_info(struct r600_common_screen *rscreen,
                        "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
                        "mode=%u, tiling_index = %u\n",
                        i, rtex->surface.u.legacy.level[i].offset,
-                       rtex->surface.u.legacy.level[i].slice_size,
+                       (uint64_t)rtex->surface.u.legacy.level[i].slice_size_dw * 4,
                        u_minify(rtex->resource.b.b.width0, i),
                        u_minify(rtex->resource.b.b.height0, i),
                        u_minify(rtex->resource.b.b.depth0, i),
@@ -1084,7 +1085,7 @@ void si_print_texture_info(struct r600_common_screen *rscreen,
                                "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, "
                                "mode=%u, tiling_index = %u\n",
                                i, rtex->surface.u.legacy.stencil_level[i].offset,
-                               rtex->surface.u.legacy.stencil_level[i].slice_size,
+                               (uint64_t)rtex->surface.u.legacy.stencil_level[i].slice_size_dw * 4,
                                u_minify(rtex->resource.b.b.width0, i),
                                u_minify(rtex->resource.b.b.height0, i),
                                u_minify(rtex->resource.b.b.depth0, i),

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index bf7a2ae910b43ec012ee696af9140b191a8aa6e2..3e060e2ddbaa355a800be1baa02cedfb12f318e7 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1507,7 +1507,7 @@ static unsigned texture_offset(struct radeon_surf *surface, unsigned layer,
        default:
        case RUVD_SURFACE_TYPE_LEGACY:
                return surface->u.legacy.level[0].offset +
-                       layer * surface->u.legacy.level[0].slice_size;
+                       layer * (uint64_t)surface->u.legacy.level[0].slice_size_dw * 4;
                break;
        case RUVD_SURFACE_TYPE_GFX9:
                return surface->u.gfx9.surf_offset +

diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/cik_sdma.c
index 374dfcf4c2d5eb9c78c00f503d104a8db12ab188..8a18bbf455c60e55aa9b265fc8d9b817cd913ece 100644 (file)
--- a/src/gallium/drivers/radeonsi/cik_sdma.c
+++ b/src/gallium/drivers/radeonsi/cik_sdma.c
@@ -165,8 +165,8 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
                                            rsrc->surface.tile_swizzle : 0;
        unsigned dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x;
        unsigned src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x;
-       uint64_t dst_slice_pitch = rdst->surface.u.legacy.level[dst_level].slice_size / bpp;
-       uint64_t src_slice_pitch = rsrc->surface.u.legacy.level[src_level].slice_size / bpp;
+       uint64_t dst_slice_pitch = ((uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4) / bpp;
+       uint64_t src_slice_pitch = ((uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4) / bpp;
        unsigned dst_width = minify_as_blocks(rdst->resource.b.b.width0,
                                              dst_level, rdst->surface.blk_w);
        unsigned src_width = minify_as_blocks(rsrc->resource.b.b.width0,

diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index d33ec6b11b3f411a1725567fa28a745d2d1a898f..6e229446e228ab370b5e934101001fe7d6488421 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -175,7 +175,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
        height = rtiled->surface.u.legacy.level[tiled_lvl].nblk_y;
        base = rtiled->surface.u.legacy.level[tiled_lvl].offset;
        addr = rlinear->surface.u.legacy.level[linear_lvl].offset;
-       addr += rlinear->surface.u.legacy.level[linear_lvl].slice_size * linear_z;
+       addr += (uint64_t)rlinear->surface.u.legacy.level[linear_lvl].slice_size_dw * 4 * linear_z;
        addr += linear_y * pitch + linear_x * bpp;
        bank_h = G_009910_BANK_HEIGHT(tile_mode);
        bank_w = G_009910_BANK_WIDTH(tile_mode);
@@ -301,13 +301,13 @@ static void si_dma_copy(struct pipe_context *ctx,
                 *   dst_pitch == src_pitch
                 */
                src_offset= rsrc->surface.u.legacy.level[src_level].offset;
-               src_offset += rsrc->surface.u.legacy.level[src_level].slice_size * src_box->z;
+               src_offset += (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4 * src_box->z;
                src_offset += src_y * src_pitch + src_x * bpp;
                dst_offset = rdst->surface.u.legacy.level[dst_level].offset;
-               dst_offset += rdst->surface.u.legacy.level[dst_level].slice_size * dst_z;
+               dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
                dst_offset += dst_y * dst_pitch + dst_x * bpp;
                si_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset,
-                                  rsrc->surface.u.legacy.level[src_level].slice_size);
+                                  (uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4);
        } else {
                si_dma_copy_tile(sctx, dst, dst_level, dst_x, dst_y, dst_z,
                                 src, src_level, src_x, src_y, src_box->z,

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
index 43bf7ed295c1cf1e23b9d943f6dafb9b5fa522c1..5ee01ff90f92e7b393f65116bd393616af5d2f74 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c
@@ -68,7 +68,7 @@ static void surf_level_winsys_to_drm(struct radeon_surface_level *level_drm,
                                      unsigned bpe)
 {
     level_drm->offset = level_ws->offset;
-    level_drm->slice_size = level_ws->slice_size;
+    level_drm->slice_size = (uint64_t)level_ws->slice_size_dw * 4;
     level_drm->nblk_x = level_ws->nblk_x;
     level_drm->nblk_y = level_ws->nblk_y;
     level_drm->pitch_bytes = level_ws->nblk_x * bpe;
@@ -80,7 +80,7 @@ static void surf_level_drm_to_winsys(struct legacy_surf_level *level_ws,
                                      unsigned bpe)
 {
     level_ws->offset = level_drm->offset;
-    level_ws->slice_size = level_drm->slice_size;
+    level_ws->slice_size_dw = level_drm->slice_size / 4;
     level_ws->nblk_x = level_drm->nblk_x;
     level_ws->nblk_y = level_drm->nblk_y;
     level_ws->mode = level_drm->mode;