* gas/ppc/booke.s: Add tlbsx, tlbsxe.

	* gas/ppc/booke.d: Update.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 263fde43c0ff0c844c0bab2c16d9551d8f973f8e..d3dfee25fd4c23bdfdb261b7f75a2fd9df9d8cb8 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-04-19  Nathan Froyd <froydnj@codesourcery.com>
+
+       * gas/ppc/booke.s: Add tlbsx, tlbsxe.
+       * gas/ppc/booke.d: Update.
+
 2007-04-18  H.J. Lu <hongjiu.lu@intel.com>
 
        * gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.

diff --git a/gas/testsuite/gas/ppc/booke.d b/gas/testsuite/gas/ppc/booke.d
index 56c7d5e3ae45233d33680261a4b57dd62928987f..b07033f675e5553072024c3ab28b5d7933ec9c43 100644 (file)
--- a/gas/testsuite/gas/ppc/booke.d
+++ b/gas/testsuite/gas/ppc/booke.d
@@ -142,11 +142,15 @@ Disassembly of section \.text:
  1c0:  7c 00 06 ac     mbar    
  1c4:  7c 00 06 ac     mbar    
  1c8:  7c 20 06 ac     mbar    1
- 1cc:  7c 12 42 a6     mfsprg  r0,2
- 1d0:  7c 12 42 a6     mfsprg  r0,2
- 1d4:  7c 12 43 a6     mtsprg  2,r0
- 1d8:  7c 12 43 a6     mtsprg  2,r0
- 1dc:  7c 07 42 a6     mfsprg  r0,7
- 1e0:  7c 07 42 a6     mfsprg  r0,7
- 1e4:  7c 17 43 a6     mtsprg  7,r0
- 1e8:  7c 17 43 a6     mtsprg  7,r0
+ 1cc:  7d 8d 77 24     tlbsx   r12,r13,r14
+ 1d0:  7d 8d 77 25     tlbsx\.  r12,r13,r14
+ 1d4:  7d 8d 77 26     tlbsxe  r12,r13,r14
+ 1d8:  7d 8d 77 27     tlbsxe\. r12,r13,r14
+ 1dc:  7c 12 42 a6     mfsprg  r0,2
+ 1e0:  7c 12 42 a6     mfsprg  r0,2
+ 1e4:  7c 12 43 a6     mtsprg  2,r0
+ 1e8:  7c 12 43 a6     mtsprg  2,r0
+ 1ec:  7c 07 42 a6     mfsprg  r0,7
+ 1f0:  7c 07 42 a6     mfsprg  r0,7
+ 1f4:  7c 17 43 a6     mtsprg  7,r0
+ 1f8:  7c 17 43 a6     mtsprg  7,r0

diff --git a/gas/testsuite/gas/ppc/booke.s b/gas/testsuite/gas/ppc/booke.s
index 0c6cf88f66a418d2642f15d497b00889c9d73ef5..fa53c019b6747dc5a09a0796708db4f546c878e4 100644 (file)
--- a/gas/testsuite/gas/ppc/booke.s
+++ b/gas/testsuite/gas/ppc/booke.s
@@ -135,6 +135,11 @@ branch_target_8:
        mbar    0
        mbar    1
 
+       tlbsx   12, 13, 14
+       tlbsx.  12, 13, 14
+       tlbsxe  12, 13, 14
+       tlbsxe. 12, 13, 14
+
        mfsprg 0, 2
        mfsprg2 0
        mtsprg 2, 0