condition to disallow non-identical memory locations.
(*andqi3_2, andqi3_1, iorqi3_1, xorqi3_1): Reorder insn to give
preference to bit manipulation instructions.
- * gcc.dg/h8300-bit-insn-ice2.2: New testcase.
2011-06-13 Jan Hubicka <jh@suse.cz>
+2011-06-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gcc.dg/h8300-bit-insn-ice2.2: Remove duplicated lines.
+
+2011-06-13 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
+
+ * gcc.dg/h8300-bit-insn-ice2.2: New testcase.
+
2011-06-13 Thomas Koenig <tkoenig@gcc.gnu.org>
* gfortran.dg/trim_optimize_8.f90: New test case.
MSTPCRA = MSTPCRA2 | ~0xFE;
return 0;
}
-/* { dg-skip-if "" { "h8300*-*-*" } "*" "-msx*" } */
-/* { dg-options "-O2" } */
-/* ICE for bit instruction generation using 16-bit const */
-
-#define MSTPCRA (*(volatile unsigned char*)0xFFFFC9)
-#define MSTPCRA2 (*(volatile unsigned char*)0xFFFDC8)
-
-int
-main (void)
-{
- MSTPCRA = MSTPCRA2 & ~0x01;
- MSTPCRA = MSTPCRA2 ^ ~0xFE;
- MSTPCRA = MSTPCRA2 | ~0xFE;
- return 0;
-}