re PR target/70341 (cost model for addresses is incorrect, slsr is using reg + reg...

	PR target/70341
	* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
	MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.

From-SVN: r269260

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2fd847ac1fee02c9b3146214f7a35402d8526c26..95262b4dbc95d9c77de4fbc9e531b9b89711ede5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -10,6 +10,8 @@
        (thumb2_casesi_internal_pic): New define_expand.  Rename old
        define_insn to ...
        (*thumb2_casesi_internal_pic): ... this.  Add mode to LABEL_REFs.
+       * config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
+       MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.
 
 2019-02-27  Richard Biener  <rguenther@suse.de>
 

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index b7cd9fc787b8526cc7b11b9430fbfcd73103328a..ff83974aeb0b1bf46415c29ba47ada74a79d7586 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -622,13 +622,27 @@
                                    operands[0], operands[2], operands[4]));
 
     operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[3]));
-    emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0],
-                                        operands[3]));
+    operands[2]
+      = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[2], operands[0]),
+                       UNSPEC_CASESI);
+    operands[2] = gen_rtx_MEM (DImode, operands[2]);
+    MEM_READONLY_P (operands[2]) = 1;
+    MEM_NOTRAP_P (operands[2]) = 1;
+    emit_jump_insn (gen_casesi_dispatch (operands[2], operands[3]));
     DONE;
   }
 )
 
-(define_insn "casesi_dispatch"
+(define_expand "casesi_dispatch"
+  [(parallel
+    [(set (pc) (match_operand:DI 0 ""))
+     (clobber (reg:CC CC_REGNUM))
+     (clobber (match_scratch:DI 2))
+     (clobber (match_scratch:DI 3))
+     (use (label_ref:DI (match_operand 1 "")))])]
+  "")
+
+(define_insn "*casesi_dispatch"
   [(parallel
     [(set (pc)
          (mem:DI (unspec [(match_operand:DI 0 "register_operand" "r")
@@ -637,7 +651,7 @@
      (clobber (reg:CC CC_REGNUM))
      (clobber (match_scratch:DI 3 "=r"))
      (clobber (match_scratch:DI 4 "=r"))
-     (use (label_ref (match_operand 2 "" "")))])]
+     (use (label_ref:DI (match_operand 2 "" "")))])]
   ""
   "*
   return aarch64_output_casesi (operands);