r600: r700PredictRenderSize can flush, so move index buffer setup after it

diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 0aef0b7ea1f7dc3e65b36143dedbab3a5709fcfe..4f39d9f1bdfa7afd7f286cd11a9132ab49e2f335 100644 (file)
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -960,7 +960,6 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
 
     _tnl_UpdateFixedFunctionProgram(ctx);
     r700SetVertexFormat(ctx, arrays, max_index + 1);
-    r700SetupIndexBuffer(ctx, ib);
     /* shaders need to be updated before buffers are validated */
     r700UpdateShaders2(ctx);
     if (!r600ValidateBuffers(ctx))
@@ -981,6 +980,7 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
     GLuint emit_end = r700PredictRenderSize(ctx, nr_prims)
                     + context->radeon.cmdbuf.cs->cdw;
 
+    r700SetupIndexBuffer(ctx, ib);
     r700SetupStreams2(ctx, arrays, max_index + 1);
 
     radeonEmitState(radeon);