i965: Apply CMP NULL {Switch} work-around to other Gen7s.

Listed in the restrictions section of CMP, but not on the work-arounds
page.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 704f219f6f77356100d292f768d81338c94ec03a..dda562faa9f8cf265a948df73c498ecbc4c1ee33 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1677,8 +1677,11 @@ void brw_CMP(struct brw_compile *p,
    /* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec workarounds
     * page says:
     *    "Any CMP instruction with a null destination must use a {switch}."
+    *
+    * It also applies to other Gen7 platforms (IVB, BYT) even though it isn't
+    * mentioned on their work-arounds pages.
     */
-   if (intel->is_haswell) {
+   if (intel->gen == 7) {
       if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE &&
           dest.nr == BRW_ARF_NULL) {
          insn->header.thread_control = BRW_THREAD_SWITCH;