Previously we'd generate a non-canonical zero-extended CONST_INT
instead of a sign-extended one, which tripped the assert for
canonical CONST_INTs after a later patch.
2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
gen_int_mode rather than GEN_INT.
* config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.
From-SVN: r256024
+2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
+ gen_int_mode rather than GEN_INT.
+ * config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.
+
2017-12-28 Richard Sandiford <richard.sandiford@linaro.org>
* emit-rtl.c (gen_const_vec_series): Use valid_for_const_vector_p
RTVEC_ELT (v, i) = const0_rtx;
high = (BYTES_BIG_ENDIAN) ? 0 : 15;
- RTVEC_ELT (v, high) = GEN_INT (0x80);
+ RTVEC_ELT (v, high) = gen_int_mode (0x80, QImode);
rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v));
DONE;
RTVEC_ELT (v, i) = const0_rtx;
high = (BYTES_BIG_ENDIAN) ? 0 : 15;
- RTVEC_ELT (v, high) = GEN_INT (0x80);
+ RTVEC_ELT (v, high) = gen_int_mode (0x80, QImode);
rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v));
DONE;