no need for this info to be exported to pipe driver.
r600_queries_suspend(ctx);
/* schedule draw*/
- r = radeon_ctx_set_draw(&rctx->ctx, &draw);
+ r = radeon_ctx_set_draw(rctx->ctx, &draw);
if (r == -EBUSY) {
r600_flush(ctx, 0, NULL);
- r = radeon_ctx_set_draw(&rctx->ctx, &draw);
+ r = radeon_ctx_set_draw(rctx->ctx, &draw);
}
if (r) {
goto out;
free(rctx->vs_constant);
free(rctx->vs_resource);
- radeon_ctx_fini(&rctx->ctx);
+ radeon_ctx_fini(rctx->ctx);
FREE(rctx);
}
{
struct r600_context *rctx = r600_context(ctx);
struct r600_query *rquery = NULL;
- static int dc = 0;
-#if 0
- char dname[256];
-#endif
/* suspend queries */
r600_queries_suspend(ctx);
- /* FIXME dumping should be removed once shader support instructions
- * without throwing bad code
- */
- if (!rctx->ctx.cdwords)
- goto out;
-#if 0
- sprintf(dname, "gallium-%08d.bof", dc);
- if (dc < 2) {
- radeon_ctx_dump_bof(&rctx->ctx, dname);
- R600_ERR("dumped %s\n", dname);
- }
-#endif
-#if 1
- radeon_ctx_submit(&rctx->ctx);
-#endif
+
+ radeon_ctx_submit(rctx->ctx);
+
LIST_FOR_EACH_ENTRY(rquery, &rctx->query_list, list) {
rquery->flushed = true;
}
- dc++;
-out:
- radeon_ctx_clear(&rctx->ctx);
+
+ radeon_ctx_clear(rctx->ctx);
/* resume queries */
r600_queries_resume(ctx);
}
return NULL;
}
- radeon_ctx_init(&rctx->ctx, rscreen->rw);
+ rctx->ctx = radeon_ctx_init(rscreen->rw);
radeon_draw_init(&rctx->draw, rscreen->rw);
return &rctx->context;
}
struct pipe_context context;
struct r600_screen *screen;
struct radeon *rw;
- struct radeon_ctx ctx;
+ struct radeon_ctx *ctx;
struct blitter_context *blitter;
struct radeon_draw draw;
struct r600_context_hw_state_vtbl *vtbl;
rctx->vtbl->vgt_prim(draw, prim, vgt_dma_index_type);
radeon_draw_bind(&rctx->draw, &draw->vgt);
- r = radeon_ctx_set_draw(&rctx->ctx, &rctx->draw);
+ r = radeon_ctx_set_draw(rctx->ctx, &rctx->draw);
if (r == -EBUSY) {
r600_flush(draw->ctx, 0, NULL);
- r = radeon_ctx_set_draw(&rctx->ctx, &rctx->draw);
+ r = radeon_ctx_set_draw(rctx->ctx, &rctx->draw);
}
radeon_state_fini(&draw->draw);
rquery->num_results = 0;
rquery->flushed = false;
r600_query_resume(ctx, rquery);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
if (r == -EBUSY) {
/* this shouldn't happen */
R600_ERR("had to flush while emitting end query\n");
ctx->flush(ctx, 0, NULL);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
}
}
rquery->state &= ~R600_QUERY_STATE_STARTED;
rquery->state |= R600_QUERY_STATE_ENDED;
r600_query_suspend(ctx, rquery);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
if (r == -EBUSY) {
/* this shouldn't happen */
R600_ERR("had to flush while emitting end query\n");
ctx->flush(ctx, 0, NULL);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
}
}
LIST_FOR_EACH_ENTRY(rquery, &rctx->query_list, list) {
if (rquery->state & R600_QUERY_STATE_STARTED) {
r600_query_suspend(ctx, rquery);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
if (r == -EBUSY) {
/* this shouldn't happen */
R600_ERR("had to flush while emitting end query\n");
ctx->flush(ctx, 0, NULL);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
}
}
rquery->state |= R600_QUERY_STATE_SUSPENDED;
LIST_FOR_EACH_ENTRY(rquery, &rctx->query_list, list) {
if (rquery->state & R600_QUERY_STATE_STARTED) {
r600_query_resume(ctx, rquery);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
if (r == -EBUSY) {
/* this shouldn't happen */
R600_ERR("had to flush while emitting end query\n");
ctx->flush(ctx, 0, NULL);
- r = radeon_ctx_set_query_state(&rctx->ctx, &rquery->rstate);
+ r = radeon_ctx_set_query_state(rctx->ctx, &rquery->rstate);
}
}
rquery->state &= ~R600_QUERY_STATE_SUSPENDED;
};
#pragma pack()
-struct radeon_ctx {
- struct radeon *radeon;
- u32 *pm4;
- int cdwords;
- int ndwords;
- unsigned nreloc;
- struct radeon_cs_reloc *reloc;
- unsigned nbo;
- struct radeon_bo **bo;
-};
+struct radeon_ctx;
-int radeon_ctx_init(struct radeon_ctx *ctx, struct radeon *radeon);
+struct radeon_ctx *radeon_ctx_init(struct radeon *radeon);
void radeon_ctx_fini(struct radeon_ctx *ctx);
void radeon_ctx_clear(struct radeon_ctx *ctx);
int radeon_ctx_set_draw(struct radeon_ctx *ctx, struct radeon_draw *draw);
ctx->nbo = 0;
}
-int radeon_ctx_init(struct radeon_ctx *ctx, struct radeon *radeon)
+struct radeon_ctx *radeon_ctx_init(struct radeon *radeon)
{
+ struct radeon_ctx *ctx;
if (radeon == NULL)
- return -EINVAL;
- memset(ctx, 0, sizeof(struct radeon_ctx));
+ return NULL;
+ ctx = calloc(1, sizeof(struct radeon_ctx));
ctx->radeon = radeon_incref(radeon);
radeon_ctx_clear(ctx);
ctx->pm4 = malloc(RADEON_CTX_MAX_PM4 * 4);
if (ctx->pm4 == NULL) {
radeon_ctx_fini(ctx);
- return -ENOMEM;
+ return NULL;
}
ctx->reloc = malloc(sizeof(struct radeon_cs_reloc) * RADEON_CTX_MAX_PM4);
if (ctx->reloc == NULL) {
radeon_ctx_fini(ctx);
- return -ENOMEM;
+ return NULL;
}
ctx->bo = malloc(sizeof(void *) * RADEON_CTX_MAX_PM4);
if (ctx->bo == NULL) {
radeon_ctx_fini(ctx);
- return -ENOMEM;
+ return NULL;
}
- return 0;
+ return ctx;
}
void radeon_ctx_fini(struct radeon_ctx *ctx)
free(ctx->bo);
free(ctx->pm4);
free(ctx->reloc);
- memset(ctx, 0, sizeof(struct radeon_ctx));
+ free(ctx);
}
static int radeon_ctx_state_bo(struct radeon_ctx *ctx, struct radeon_state *state)
unsigned npm4;
};
+struct radeon_ctx {
+ struct radeon *radeon;
+ u32 *pm4;
+ int cdwords;
+ int ndwords;
+ unsigned nreloc;
+ struct radeon_cs_reloc *reloc;
+ unsigned nbo;
+ struct radeon_bo **bo;
+};
+
struct radeon {
int fd;
int refcount;