iris_flush_and_dirty_for_history(ice, batch, (struct iris_resource *)
info->dst.resource,
+ PIPE_CONTROL_RENDER_TARGET_FLUSH,
"cache history: post-blit");
}
}
iris_flush_and_dirty_for_history(ice, batch, (struct iris_resource *) dst,
+ PIPE_CONTROL_RENDER_TARGET_FLUSH,
"cache history: post copy_region");
}
blorp_batch_finish(&blorp_batch);
iris_flush_and_dirty_for_history(ice, batch, res,
+ PIPE_CONTROL_RENDER_TARGET_FLUSH,
"cache history: post color clear");
iris_resource_finish_render(ice, res, level,
if (z_res && clear_depth &&
can_fast_clear_depth(ice, z_res, level, box, depth)) {
fast_clear_depth(ice, z_res, level, box, depth);
- iris_flush_and_dirty_for_history(ice, batch, res,
+ iris_flush_and_dirty_for_history(ice, batch, res, 0,
"cache history: post fast Z clear");
clear_depth = false;
z_res = false;
clear_stencil && stencil_res ? 0xff : 0, stencil);
blorp_batch_finish(&blorp_batch);
- iris_flush_and_dirty_for_history(ice, batch, res,
+ iris_flush_and_dirty_for_history(ice, batch, res, 0,
"cache history: post slow ZS clear");
if (z_res) {
iris_flush_and_dirty_for_history(struct iris_context *ice,
struct iris_batch *batch,
struct iris_resource *res,
+ uint32_t extra_flags,
const char *reason)
{
if (res->base.target != PIPE_BUFFER)
return;
- uint32_t flush = iris_flush_bits_for_history(res);
-
- /* We've likely used the rendering engine (i.e. BLORP) to write to this
- * surface. Flush the render cache so the data actually lands.
- */
- if (batch->name != IRIS_BATCH_COMPUTE)
- flush |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
+ uint32_t flush = iris_flush_bits_for_history(res) | extra_flags;
iris_emit_pipe_control_flush(batch, reason, flush);
void iris_flush_and_dirty_for_history(struct iris_context *ice,
struct iris_batch *batch,
struct iris_resource *res,
+ uint32_t extra_flags,
const char *reason);
unsigned iris_get_num_logical_layers(const struct iris_resource *res,