r600/sfn: Fix mapping for f32tof64 and f64tof32

We define the mapping based on the vector unit opcode.

Closes #3013

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5187>

diff --git a/src/gallium/drivers/r600/sfn/sfn_alu_defines.h b/src/gallium/drivers/r600/sfn/sfn_alu_defines.h
index 3d270bd2debb7d61e6ba99161b35ce15c23eb498..337f436c4cea455cee8ef416f10efbb39bf147e6 100644 (file)
--- a/src/gallium/drivers/r600/sfn/sfn_alu_defines.h
+++ b/src/gallium/drivers/r600/sfn/sfn_alu_defines.h
@@ -61,7 +61,7 @@ enum EAluOp {
    op0_nop = 26,
    op2_mul_64 = 27,
    op1_flt64_to_flt32 = 28,
-   op1v_flt32_to_flt64 = 29,
+   op1_flt32_to_flt64 = 29,
    op2_pred_setgt_uint = 30,
    op2_pred_setge_uint = 31,
    op2_pred_sete = 32,
@@ -190,7 +190,7 @@ enum EAluOp {
    op2_add_64 = 203,
    op1_mova_int = 204,
    op1v_flt64_to_flt32 = 205,
-   op1_flt32_to_flt64 = 206,
+   op1v_flt32_to_flt64 = 206,
    op2_sad_accum_prev_uint = 207,
    op2_dot = 208,
    op2_mul_prev = 209,

diff --git a/src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp b/src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp
index e378d0480af4905723064b0483df551954552118..dd6e9f63c070844ba12b5985ebc5018a018df042 100644 (file)
--- a/src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp
@@ -1258,8 +1258,8 @@ const std::map<EAluOp, int> opcode_map = {
    {op1_mov, ALU_OP1_MOV},
    {op0_nop, ALU_OP0_NOP},
    {op2_mul_64, ALU_OP2_MUL_64},
-   {op1_flt64_to_flt32, ALU_OP1_FLT64_TO_FLT32},
-   {op1v_flt64_to_flt32, ALU_OP1_FLT32_TO_FLT64},
+   {op1v_flt64_to_flt32, ALU_OP1_FLT64_TO_FLT32},
+   {op1v_flt32_to_flt64, ALU_OP1_FLT32_TO_FLT64},
    {op2_pred_setgt_uint, ALU_OP2_PRED_SETGT_UINT},
    {op2_pred_setge_uint, ALU_OP2_PRED_SETGE_UINT},
    {op2_pred_sete, ALU_OP2_PRED_SETE},