+2017-11-03 Uros Bizjak <ubizjak@gmail.com>
+
+ PR testsuite/82828
+ PR rtl-optimization/70263
+ * gcc.target/i386/pr70263-2.c: Fix invalid testcase.
+
2017-11-03 Marc Glisse <marc.glisse@inria.fr>
* gcc.dg/tree-ssa/negneg-1.c: New file.
/* { dg-final { scan-rtl-dump "Adding REG_EQUIV to insn \[0-9\]+ for source of insn \[0-9\]+" "ira" } } */
typedef float XFtype __attribute__ ((mode (XF)));
-typedef _Complex float XCtype __attribute__ ((mode (XC)));
-XCtype
-__mulxc3 (XFtype a, XFtype b, XFtype c, XFtype d)
+
+void bar (XFtype);
+
+void
+foo (XFtype a, XFtype c)
{
- XFtype ac, bd, ad, bc, x, y;
- ac = a * c;
-__asm__ ("": "=m" (ac):"m" (ac));
- if (x != x)
- {
- _Bool recalc = 0;
- if (((!(!(((ac) - (ac)) != ((ac) - (ac)))))))
- recalc = 1;
- if (recalc)
- x = __builtin_huge_vall () * (a * c - b * d);
- }
- return x;
+ XFtype ac = a * c;
+
+ bar (ac);
}