arm: Correctly display disassembly of vldmia/vstmia

The MicroMemOp class generates the disassembly for both integer
and floating point instructions, but it would always print its
first operand as an integer register without considering that the
op may be a floating instruction in which case a float register
should be displayed instead.

diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc
index 42cb98a7ca2b1e20307d2d9cb7805b39652e58b8..cd77d6d5f4d7e047369ac2003dc0d4c64eab44ec 100644 (file)
--- a/src/arch/arm/insts/macromem.cc
+++ b/src/arch/arm/insts/macromem.cc
@@ -1483,7 +1483,10 @@ MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
     std::stringstream ss;
     printMnemonic(ss);
-    printReg(ss, ura);
+    if (isFloating())
+        printReg(ss, ura + FP_Reg_Base);
+    else
+        printReg(ss, ura);
     ss << ", [";
     printReg(ss, urb);
     ss << ", ";