[NDS32] Split movdi/df if reigster number is illegal.

gcc/
	* config/nds32/nds32-doubleword.md: New define_split pattern for
	illegal register number.

From-SVN: r259646

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3c7e29d2d7d0a3200606e80ce0b549217cefb90f..a0adc88433e14647c4d31fb385348f1cf0730794 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-04-25  Chung-Ju Wu  <jasonwucj@gmail.com>
+
+       * config/nds32/nds32-doubleword.md: New define_split pattern for
+       illegal register number.
+
 2018-04-25  Chung-Ju Wu  <jasonwucj@gmail.com>
 
        * config/nds32/nds32.c (nds32_print_operand): Set op_value ealier.

diff --git a/gcc/config/nds32/nds32-doubleword.md b/gcc/config/nds32/nds32-doubleword.md
index 7df715a771fea828487e7d578f3340e5afcf3a3f..4505337c3aa3d46ae200e80587889adb216ee380 100644 (file)
--- a/gcc/config/nds32/nds32-doubleword.md
+++ b/gcc/config/nds32/nds32-doubleword.md
@@ -118,6 +118,24 @@
      ])
    (set_attr "feature" " v1, v1,  v1,  v1,   v1,   v1,    fpu,    fpu,    fpu,    fpu,    fpu")])
 
+;; Split move_di pattern when the hard register is odd.
+(define_split
+  [(set (match_operand:DIDF 0 "register_operand" "")
+       (match_operand:DIDF 1 "register_operand" ""))]
+  "(NDS32_IS_GPR_REGNUM (REGNO (operands[0]))
+    && ((REGNO (operands[0]) & 0x1) == 1))
+   || (NDS32_IS_GPR_REGNUM (REGNO (operands[1]))
+       && ((REGNO (operands[1]) & 0x1) == 1))"
+  [(set (match_dup 2) (match_dup 3))
+   (set (match_dup 4) (match_dup 5))]
+  {
+     operands[2] = gen_lowpart (SImode, operands[0]);
+     operands[4] = gen_highpart (SImode, operands[0]);
+     operands[3] = gen_lowpart (SImode, operands[1]);
+     operands[5] = gen_highpart (SImode, operands[1]);
+  }
+)
+
 (define_split
   [(set (match_operand:DIDF 0 "register_operand"     "")
        (match_operand:DIDF 1 "const_double_operand" ""))]