case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_2:
+ case AARCH64_OPND_SME_Zm_INDEX3_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
info->imm.value = val;
break;
+ case AARCH64_OPND_SME_ZA_array_off2x2:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
+ case AARCH64_OPND_SME_ZA_array_off3x2:
case AARCH64_OPND_SME_ZA_array_off4:
if (!parse_dual_indexed_reg (&str, REG_TYPE_ZA,
&info->indexed_za, &qualifier, 0))
--- /dev/null
+#as: -march=armv8-a
+#source: sme2-12-invalid.s
+#error_output: sme2-12-invalid.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfmlal 0,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfmlal za\.s\[w8,0:1\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
--- /dev/null
+ bfmlal 0, z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], 0, z0.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, 0
+
+ bfmlal za.s[w7, 0:1], z0.h, z0.h[0]
+ bfmlal za.s[w12, 0:1], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:0], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:2], z0.h, z0.h[0]
+ bfmlal za.s[w8, 1:2], z0.h, z0.h[0]
+ bfmlal za.s[w8, 1:0], z0.h, z0.h[0]
+ bfmlal za.s[w8, -2:-1], z0.h, z0.h[0]
+ bfmlal za.s[w8, 16:17], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx2], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z16.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[-1]
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[8]
+ bfmlal za.s[w8, 0:1], z0.s, z0.s[0]
+ bfmlal za.h[w8, 0:1], z0.h, z0.h[0]
+
+ bfmlal za.s[w7, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w12, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:0], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:2], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 1:2], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 1:0], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 8:9], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 16:17], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h - z2.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z16.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[-1]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[8]
+ bfmlal za.s[w8, 0:1], { z0.s - z1.s }, z0.s[0]
+ bfmlal za.h[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+
+ bfmlal za.s[w7, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w12, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:0], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:2], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 1:2], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 1:0], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 8:9], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 16:17], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h - z4.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z16.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[-1]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[8]
+ bfmlal za.s[w8, 0:1], { z0.s - z3.s }, z0.s[0]
+ bfmlal za.h[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+
+ bfmlal za.s[w7, 0:1], z0.h, z0.h
+ bfmlal za.s[w12, 0:1], z0.h, z0.h
+ bfmlal za.s[w8, 0], z0.h, z0.h
+ bfmlal za.s[w8, 0:0], z0.h, z0.h
+ bfmlal za.s[w8, 0:2], z0.h, z0.h
+ bfmlal za.s[w8, 1:2], z0.h, z0.h
+ bfmlal za.s[w8, 1:0], z0.h, z0.h
+ bfmlal za.s[w8, -2:-1], z0.h, z0.h
+ bfmlal za.s[w8, 16:17], z0.h, z0.h
+ bfmlal za.s[w8, 0:1, vgx2], z0.h, z0.h
+ bfmlal za.s[w8, 0:1], z0.h, z16.h
+ bfmlal za.s[w8, 0:1], z0.s, z0.s
+ bfmlal za.h[w8, 0:1], z0.h, z0.h
+
+ bfmlal za.s[w7, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w12, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:0], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:2], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 1:2], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 1:0], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 8:9], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 16:17], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z16.h
+ bfmlal za.s[w8, 0:1], { z0.s - z1.s }, z0.s
+ bfmlal za.h[w8, 0:1], { z0.h - z1.h }, z0.h
+
+ bfmlal za.s[w7, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w12, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:0], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:2], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 1:2], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 1:0], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 8:9], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 16:17], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z16.h
+ bfmlal za.s[w8, 0:1], { z0.s - z3.s }, z0.s
+ bfmlal za.h[w8, 0:1], { z0.h - z3.h }, z0.h
+
+ bfmlal za.s[w7, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w12, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 1:2], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 8:9], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z1.h - z2.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z15.h - z16.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z31.h, z0.h }
+
+ bfmlal za.s[w7, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w12, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 1:2], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 8:9], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z1.h - z4.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z2.h - z5.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z3.h - z6.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z15.h - z18.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+ bfmlal za.s[w8, 0:1], { z0.h - z2.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z2.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z4.h }
+
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+ bfmlal za[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
--- /dev/null
+#as: -march=armv8-a+sme
+#source: sme2-12.s
+#error_output: sme2-12-noarch.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z1\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h,z30\.h,z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
--- /dev/null
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1807010 bfmlal za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801017 bfmlal za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18013f0 bfmlal za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c18f1010 bfmlal za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1809c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1893ab5 bfmlal za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1907010 bfmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901013 bfmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19013d0 bfmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f1010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1901c14 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1993656 bfmlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190f010 bfmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909013 bfmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909390 bfmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f9010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1909c14 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ebb16 bfmlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1200c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1206c10 bfmlal za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c17 bfmlal za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1200ff0 bfmlal za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c12f0c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1274f31 bfmlal za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1206810 bfmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200813 bfmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200830 bfmlal za\.s\[w8, 0:1, vgx2\], {z1\.h-z2\.h}, z0\.h
+[^:]+: c1200bd0 bfmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1200bf0 bfmlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1200bf0 bfmlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f0810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12d2a52 bfmlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z13\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306810 bfmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300813 bfmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306830 bfmlal za\.s\[w11, 0:1, vgx4\], {z1\.h-z4\.h}, z0\.h
+[^:]+: c1300b90 bfmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1300bb0 bfmlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1300bb0 bfmlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1300bd0 bfmlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300bd0 bfmlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300bf0 bfmlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c1300bf0 bfmlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f0810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c13e2b12 bfmlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a06810 bfmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00813 bfmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00bd0 bfmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be0810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b24ad1 bfmlal za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a16810 bfmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10813 bfmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10b90 bfmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd0810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b96a12 bfmlal za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1801018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1807018 bfmlsl za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c180101f bfmlsl za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18013f8 bfmlsl za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c18f1018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1809c18 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1893abd bfmlsl za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1901018 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901018 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901018 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901018 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1907018 bfmlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c190101b bfmlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19013d8 bfmlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f1018 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1901c1c bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c199365e bfmlsl za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1909018 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909018 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909018 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909018 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190f018 bfmlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190901b bfmlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909398 bfmlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f9018 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1909c1c bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ebb1e bfmlsl za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1200c18 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c18 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c18 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1206c18 bfmlsl za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c1f bfmlsl za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1200ff8 bfmlsl za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c12f0c18 bfmlsl za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1274f39 bfmlsl za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1200818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1206818 bfmlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c120081b bfmlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200bd8 bfmlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c12f0818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12d2a5a bfmlsl za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z13\.h
+[^:]+: c1300818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306818 bfmlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c130081b bfmlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300b98 bfmlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c13f0818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c13e2b1a bfmlsl za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h
+[^:]+: c1a00818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a06818 bfmlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a0081b bfmlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00bd8 bfmlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be0818 bfmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b24ad9 bfmlsl za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a10818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a16818 bfmlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a1081b bfmlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10b98 bfmlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd0818 bfmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b96a1a bfmlsl za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1801000 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801000 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801000 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1807000 fmlal za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801007 fmlal za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18013e0 fmlal za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c18f1000 fmlal za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1809c00 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1893aa5 fmlal za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1901000 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901000 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901000 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901000 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1907000 fmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901003 fmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19013c0 fmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f1000 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1901c04 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1993646 fmlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1909000 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909000 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909000 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909000 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190f000 fmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909003 fmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909380 fmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f9000 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1909c04 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ebb06 fmlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1200c00 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c00 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c00 fmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1206c00 fmlal za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c07 fmlal za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1200fe0 fmlal za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c12f0c00 fmlal za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1274f21 fmlal za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1200800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1206800 fmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200803 fmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200bc0 fmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1200be0 fmlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1200be0 fmlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f0800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12d2a62 fmlal za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1300800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306800 fmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300803 fmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300b80 fmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1300ba0 fmlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1300bc0 fmlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300bc0 fmlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300be0 fmlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f0800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c13e2b22 fmlal za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1a00800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a06800 fmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00803 fmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00bc0 fmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be0800 fmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b24ac1 fmlal za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a10800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a16800 fmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10803 fmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10b80 fmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd0800 fmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b96a02 fmlal za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1801008 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801008 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801008 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1807008 fmlsl za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c180100f fmlsl za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18013e8 fmlsl za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c18f1008 fmlsl za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1809c08 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1893aad fmlsl za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1901008 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901008 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901008 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901008 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1907008 fmlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c190100b fmlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19013c8 fmlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f1008 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1901c0c fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c199364e fmlsl za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1909008 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909008 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909008 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909008 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190f008 fmlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190900b fmlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909388 fmlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f9008 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1909c0c fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ebb0e fmlsl za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1200c08 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c08 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c08 fmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1206c08 fmlsl za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c0f fmlsl za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1200fe8 fmlsl za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c12f0c08 fmlsl za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1274f29 fmlsl za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1200808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1206808 fmlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c120080b fmlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200bc8 fmlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1200be8 fmlsl za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1200be8 fmlsl za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f0808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12d2a6a fmlsl za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1300808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306808 fmlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c130080b fmlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300b88 fmlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1300ba8 fmlsl za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1300bc8 fmlsl za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300bc8 fmlsl za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300be8 fmlsl za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f0808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c13e2b2a fmlsl za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1a00808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a06808 fmlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a0080b fmlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00bc8 fmlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be0808 fmlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b24ac9 fmlsl za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a10808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a16808 fmlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a1080b fmlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10b88 fmlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd0808 fmlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b96a0a fmlsl za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1c01000 smlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c07000 smlal za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c01007 smlal za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c1c013e0 smlal za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c1cf1000 smlal za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1c09c00 smlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1c93aa5 smlal za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1d01000 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d01000 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d07000 smlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d01003 smlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d013c0 smlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df1000 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d01c04 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1d93646 smlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1d09000 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09000 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0f000 smlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09003 smlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09380 smlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df9000 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d09c04 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c1debb06 smlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1600c00 smlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1606c00 smlal za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1600c07 smlal za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1600fe0 smlal za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c16f0c00 smlal za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1674f21 smlal za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1600800 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600800 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606800 smlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600803 smlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600bc0 smlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1600be0 smlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1600be0 smlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0800 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2a62 smlal za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700800 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700800 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706800 smlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700803 smlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700b80 smlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1700ba0 smlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1700bc0 smlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700bc0 smlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700be0 smlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c1700be0 smlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0800 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2b22 smlal za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00800 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00800 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06800 smlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00803 smlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00bc0 smlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0800 smlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f24ac1 smlal za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10800 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10800 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16800 smlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10803 smlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10b80 smlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0800 smlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96a02 smlal za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1c01008 smlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c07008 smlsl za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c0100f smlsl za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c1c013e8 smlsl za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c1cf1008 smlsl za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1c09c08 smlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1c93aad smlsl za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1d01008 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d01008 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d07008 smlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d0100b smlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d013c8 smlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df1008 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d01c0c smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1d9364e smlsl za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1d09008 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09008 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0f008 smlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0900b smlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09388 smlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df9008 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d09c0c smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c1debb0e smlsl za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1600c08 smlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1606c08 smlsl za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1600c0f smlsl za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1600fe8 smlsl za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c16f0c08 smlsl za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1674f29 smlsl za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1600808 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600808 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606808 smlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c160080b smlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600bc8 smlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1600be8 smlsl za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1600be8 smlsl za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0808 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2a6a smlsl za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700808 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700808 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706808 smlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c170080b smlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700b88 smlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1700ba8 smlsl za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1700bc8 smlsl za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700bc8 smlsl za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700be8 smlsl za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c1700be8 smlsl za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0808 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2b2a smlsl za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00808 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00808 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06808 smlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e0080b smlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00bc8 smlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0808 smlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f24ac9 smlsl za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10808 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10808 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16808 smlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e1080b smlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10b88 smlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0808 smlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96a0a smlsl za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1c01010 umlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c07010 umlal za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c01017 umlal za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c1c013f0 umlal za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c1cf1010 umlal za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1c09c10 umlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1c93ab5 umlal za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1d01010 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d01010 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d07010 umlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d01013 umlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d013d0 umlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df1010 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d01c14 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1d93656 umlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1d09010 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09010 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0f010 umlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09013 umlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09390 umlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df9010 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d09c14 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c1debb16 umlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1600c10 umlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1606c10 umlal za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1600c17 umlal za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1600ff0 umlal za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c16f0c10 umlal za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1674f31 umlal za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1600810 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600810 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606810 umlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600813 umlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600bd0 umlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1600bf0 umlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1600bf0 umlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0810 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2a72 umlal za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700810 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700810 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706810 umlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700813 umlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700b90 umlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1700bb0 umlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1700bd0 umlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700bd0 umlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700bf0 umlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c1700bf0 umlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0810 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2b32 umlal za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00810 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00810 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06810 umlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00813 umlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00bd0 umlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0810 umlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f24ad1 umlal za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10810 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10810 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16810 umlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10813 umlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10b90 umlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0810 umlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96a12 umlal za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1c01018 umlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c07018 umlsl za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1c0101f umlsl za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c1c013f8 umlsl za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c1cf1018 umlsl za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1c09c18 umlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1c93abd umlsl za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1d01018 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d01018 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d07018 umlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d0101b umlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d013d8 umlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df1018 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d01c1c umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1d9365e umlsl za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1d09018 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09018 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0f018 umlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0901b umlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d09398 umlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df9018 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d09c1c umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c1debb1e umlsl za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1600c18 umlsl za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1606c18 umlsl za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1600c1f umlsl za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1600ff8 umlsl za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c16f0c18 umlsl za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1674f39 umlsl za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1600818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606818 umlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c160081b umlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600bd8 umlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1600bf8 umlsl za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1600bf8 umlsl za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2a7a umlsl za\.s\[w9, 4:5, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706818 umlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c170081b umlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700b98 umlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1700bb8 umlsl za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1700bd8 umlsl za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700bd8 umlsl za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1700bf8 umlsl za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c1700bf8 umlsl za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2b3a umlsl za\.s\[w9, 4:5, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06818 umlsl za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e0081b umlsl za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00bd8 umlsl za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f24ad9 umlsl za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16818 umlsl za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e1081b umlsl za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10b98 umlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96a1a umlsl za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
--- /dev/null
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[0]
+ BFMLAL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ BFMLAL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ bfmlal za.s[w11, 0:1], z0.h, z0.h[0]
+ bfmlal za.s[w8, 14:15], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], z31.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z15.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[7]
+ bfmlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ bfmlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ bfmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ bfmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ bfmlal za.s[w8, 0:1], z0.h, z0.h
+ BFMLAL ZA.s[W8, 0:1], Z0.h, Z0.h
+ BFMLAL ZA.S[W8, 0:1], Z0.H, Z0.H
+ bfmlal za.s[w11, 0:1], z0.h, z0.h
+ bfmlal za.s[w8, 14:15], z0.h, z0.h
+ bfmlal za.s[w8, 0:1], z31.h, z0.h
+ bfmlal za.s[w8, 0:1], z0.h, z15.h
+ bfmlal za.s[w10, 2:3], z25.h, z7.h
+
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ bfmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z1.h - z2.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ bfmlal za.s[w9, 4:5], { z18.h - z19.h }, z13.h
+
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ bfmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w11, 0:1], { z1.h - z4.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z29.h, z30.h, z31.h, z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ bfmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h
+
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ bfmlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ bfmlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ bfmlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ bfmlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ bfmlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ BFMLSL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ BFMLSL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ bfmlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ bfmlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ bfmlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ bfmlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ bfmlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ bfmlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ bfmlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ bfmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ bfmlsl za.s[w8, 0:1], z0.h, z0.h
+ BFMLSL ZA.s[W8, 0:1], Z0.h, Z0.h
+ BFMLSL ZA.S[W8, 0:1], Z0.H, Z0.H
+ bfmlsl za.s[w11, 0:1], z0.h, z0.h
+ bfmlsl za.s[w8, 14:15], z0.h, z0.h
+ bfmlsl za.s[w8, 0:1], z31.h, z0.h
+ bfmlsl za.s[w8, 0:1], z0.h, z15.h
+ bfmlsl za.s[w10, 2:3], z25.h, z7.h
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ bfmlsl za.s[w9, 4:5], { z18.h - z19.h }, z13.h
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ bfmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ bfmlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ bfmlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ fmlal za.s[w8, 0:1], z0.h, z0.h[0]
+ FMLAL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ FMLAL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ fmlal za.s[w11, 0:1], z0.h, z0.h[0]
+ fmlal za.s[w8, 14:15], z0.h, z0.h[0]
+ fmlal za.s[w8, 0:1], z31.h, z0.h[0]
+ fmlal za.s[w8, 0:1], z0.h, z15.h[0]
+ fmlal za.s[w8, 0:1], z0.h, z0.h[7]
+ fmlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ fmlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ fmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ fmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ fmlal za.s[w8, 0:1], z0.h, z0.h
+ FMLAL ZA.s[W8, 0:1], Z0.h, Z0.h
+ FMLAL ZA.S[W8, 0:1], Z0.H, Z0.H
+ fmlal za.s[w11, 0:1], z0.h, z0.h
+ fmlal za.s[w8, 14:15], z0.h, z0.h
+ fmlal za.s[w8, 0:1], z31.h, z0.h
+ fmlal za.s[w8, 0:1], z0.h, z15.h
+ fmlal za.s[w10, 2:3], z25.h, z7.h
+
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ fmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ fmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ fmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ fmlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ fmlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ fmlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ fmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ fmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ fmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ fmlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ fmlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ fmlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ fmlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ fmlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ fmlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ fmlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ fmlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ fmlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ fmlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ FMLSL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ FMLSL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ fmlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ fmlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ fmlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ fmlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ fmlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ fmlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ fmlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ fmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ fmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ fmlsl za.s[w8, 0:1], z0.h, z0.h
+ FMLSL ZA.s[W8, 0:1], Z0.h, Z0.h
+ FMLSL ZA.S[W8, 0:1], Z0.H, Z0.H
+ fmlsl za.s[w11, 0:1], z0.h, z0.h
+ fmlsl za.s[w8, 14:15], z0.h, z0.h
+ fmlsl za.s[w8, 0:1], z31.h, z0.h
+ fmlsl za.s[w8, 0:1], z0.h, z15.h
+ fmlsl za.s[w10, 2:3], z25.h, z7.h
+
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ fmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ fmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ fmlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ fmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ fmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ fmlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ fmlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ fmlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ fmlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ fmlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ smlal za.s[w8, 0:1], z0.h, z0.h[0]
+ smlal za.s[w11, 0:1], z0.h, z0.h[0]
+ smlal za.s[w8, 14:15], z0.h, z0.h[0]
+ smlal za.s[w8, 0:1], z31.h, z0.h[0]
+ smlal za.s[w8, 0:1], z0.h, z15.h[0]
+ smlal za.s[w8, 0:1], z0.h, z0.h[7]
+ smlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ smlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ smlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ smlal za.s[w8, 0:1], z0.h, z0.h
+ smlal za.s[w11, 0:1], z0.h, z0.h
+ smlal za.s[w8, 14:15], z0.h, z0.h
+ smlal za.s[w8, 0:1], z31.h, z0.h
+ smlal za.s[w8, 0:1], z0.h, z15.h
+ smlal za.s[w10, 2:3], z25.h, z7.h
+
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ smlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ smlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ smlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ smlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ smlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ smlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ smlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ smlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ smlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ smlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ smlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ smlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ smlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ smlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ smlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ smlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ smlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ smlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ smlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ smlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ smlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ smlsl za.s[w8, 0:1], z0.h, z0.h
+ smlsl za.s[w11, 0:1], z0.h, z0.h
+ smlsl za.s[w8, 14:15], z0.h, z0.h
+ smlsl za.s[w8, 0:1], z31.h, z0.h
+ smlsl za.s[w8, 0:1], z0.h, z15.h
+ smlsl za.s[w10, 2:3], z25.h, z7.h
+
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ smlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ smlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ smlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ smlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ smlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ smlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ smlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ smlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ smlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ smlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ smlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ smlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlal za.s[w8, 0:1], z0.h, z0.h[0]
+ umlal za.s[w11, 0:1], z0.h, z0.h[0]
+ umlal za.s[w8, 14:15], z0.h, z0.h[0]
+ umlal za.s[w8, 0:1], z31.h, z0.h[0]
+ umlal za.s[w8, 0:1], z0.h, z15.h[0]
+ umlal za.s[w8, 0:1], z0.h, z0.h[7]
+ umlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ umlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ umlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ umlal za.s[w8, 0:1], z0.h, z0.h
+ umlal za.s[w11, 0:1], z0.h, z0.h
+ umlal za.s[w8, 14:15], z0.h, z0.h
+ umlal za.s[w8, 0:1], z31.h, z0.h
+ umlal za.s[w8, 0:1], z0.h, z15.h
+ umlal za.s[w10, 2:3], z25.h, z7.h
+
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ umlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ umlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ umlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ umlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ umlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ umlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ umlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ umlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ umlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ umlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ umlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ umlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ umlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ umlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ umlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ umlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ umlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ umlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ umlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ umlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ umlsl za.s[w8, 0:1], z0.h, z0.h
+ umlsl za.s[w11, 0:1], z0.h, z0.h
+ umlsl za.s[w8, 14:15], z0.h, z0.h
+ umlsl za.s[w8, 0:1], z31.h, z0.h
+ umlsl za.s[w8, 0:1], z0.h, z15.h
+ umlsl za.s[w10, 2:3], z25.h, z7.h
+
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ umlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ umlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ umlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ umlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ umlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ umlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ umlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ umlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ umlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ umlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ umlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ umlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
AARCH64_OPND_SME_PNn3_INDEX2, /* Indexed pred-as-counter reg, bits [9:5]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_array_off2x2, /* SME ZA[<Wv>, #<imm2>*2:<imm2>*2+1]. */
AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off3_5, /* SME ZA[<Wv>{, #<imm3>}]. */
+ AARCH64_OPND_SME_ZA_array_off3x2, /* SME ZA[<Wv>, #<imm3>*2:<imm3>*2+1]. */
AARCH64_OPND_SME_ZA_array_off4, /* SME ZA[<Wv>{, #<imm>}]. */
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
AARCH64_OPND_SME_Zm_INDEX1, /* Zn.T[index], bits [19:16,10]. */
AARCH64_OPND_SME_Zm_INDEX2, /* Zn.T[index], bits [19:16,11:10]. */
+ AARCH64_OPND_SME_Zm_INDEX3_2, /* Zn.T[index], bits [19:16,11:10,2]. */
+ AARCH64_OPND_SME_Zm_INDEX3_10, /* Zn.T[index], bits [19:16,15,11:10]. */
AARCH64_OPND_SME_Zn_INDEX1_16, /* Zn[index], bits [9:5] and [16:16]. */
AARCH64_OPND_SME_Zn_INDEX2_15, /* Zn[index], bits [9:5] and [16:15]. */
AARCH64_OPND_SME_Zn_INDEX2_16, /* Zn[index], bits [9:5] and [17:16]. */
case 33:
case 34:
case 35:
- case 259:
+ case 263:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
case 193:
case 194:
case 237:
- case 253:
- case 254:
- case 256:
+ case 257:
case 258:
- case 263:
- case 264:
+ case 260:
+ case 262:
+ case 267:
+ case 268:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 255:
- case 257:
+ case 259:
+ case 261:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 245:
- case 246:
case 247:
case 248:
case 249:
case 250:
case 251:
case 252:
+ case 253:
+ case 254:
+ case 255:
+ case 256:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 242:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 243:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 244:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 245:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 246:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 260:
- case 261:
- case 262:
+ case 264:
+ case 265:
+ case 266:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
{
int regno = info->indexed_za.index.regno & 3;
int imm = info->indexed_za.index.imm;
+ int countm1 = info->indexed_za.index.countm1;
+ assert (imm % (countm1 + 1) == 0);
insert_field (self->fields[0], code, regno, 0);
- insert_field (self->fields[1], code, imm, 0);
+ insert_field (self->fields[1], code, imm / (countm1 + 1), 0);
return true;
}
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2670;
+ return 2734;
}
}
}
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2539;
+ return 2571;
}
else
{
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2538;
+ return 2570;
}
}
else
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2537;
+ return 2569;
}
}
}
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2546;
+ return 2578;
}
else
{
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2542;
+ return 2574;
}
}
else
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2536;
+ return 2568;
}
else
{
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2535;
+ return 2567;
}
}
else
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2557;
+ return 2589;
}
else
{
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2556;
+ return 2588;
}
}
else
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2534;
+ return 2566;
}
}
}
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2544;
+ return 2576;
}
else
{
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2540;
+ return 2572;
}
}
}
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2547;
+ return 2579;
}
else
{
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2543;
+ return 2575;
}
}
else
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2545;
+ return 2577;
}
else
{
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2541;
+ return 2573;
}
}
}
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2473;
+ return 2505;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2474;
+ return 2506;
}
}
else
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2497;
+ return 2529;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2498;
+ return 2530;
}
}
}
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2489;
+ return 2521;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2490;
+ return 2522;
}
}
else
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2481;
+ return 2513;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2482;
+ return 2514;
}
}
}
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2505;
+ return 2537;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2506;
+ return 2538;
}
}
else
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2529;
+ return 2561;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2530;
+ return 2562;
}
}
}
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2521;
+ return 2553;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2522;
+ return 2554;
}
}
else
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2513;
+ return 2545;
}
else
{
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2514;
+ return 2546;
}
}
}
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2469;
+ return 2501;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2470;
+ return 2502;
}
}
else
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2493;
+ return 2525;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2494;
+ return 2526;
}
}
}
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2485;
+ return 2517;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2486;
+ return 2518;
}
}
else
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2477;
+ return 2509;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2478;
+ return 2510;
}
}
}
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2501;
+ return 2533;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2502;
+ return 2534;
}
}
else
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2525;
+ return 2557;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2526;
+ return 2558;
}
}
}
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2517;
+ return 2549;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2518;
+ return 2550;
}
}
else
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2509;
+ return 2541;
}
else
{
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2510;
+ return 2542;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2583;
+ return 2631;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2584;
+ return 2632;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2607;
+ return 2655;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2608;
+ return 2656;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2599;
+ return 2647;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2600;
+ return 2648;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2591;
+ return 2639;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2592;
+ return 2640;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2615;
+ return 2663;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2616;
+ return 2664;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2639;
+ return 2687;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2640;
+ return 2688;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2631;
+ return 2679;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2632;
+ return 2680;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2623;
+ return 2671;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2624;
+ return 2672;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2579;
+ return 2627;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2580;
+ return 2628;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2603;
+ return 2651;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2604;
+ return 2652;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2595;
+ return 2643;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2596;
+ return 2644;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2587;
+ return 2635;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2588;
+ return 2636;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2611;
+ return 2659;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2612;
+ return 2660;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2635;
+ return 2683;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2636;
+ return 2684;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2627;
+ return 2675;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2628;
+ return 2676;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2619;
+ return 2667;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2620;
+ return 2668;
}
}
}
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2475;
+ return 2507;
}
else
{
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2499;
+ return 2531;
}
}
else
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2491;
+ return 2523;
}
else
{
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2483;
+ return 2515;
}
}
}
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2507;
+ return 2539;
}
else
{
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2531;
+ return 2563;
}
}
else
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2523;
+ return 2555;
}
else
{
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2515;
+ return 2547;
}
}
}
10987654321098765432109876543210
x0x00001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2476;
+ return 2508;
}
else
{
10987654321098765432109876543210
x1x00001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2533;
+ return 2565;
}
}
else
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2500;
+ return 2532;
}
}
else
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2492;
+ return 2524;
}
else
{
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2484;
+ return 2516;
}
}
}
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2508;
+ return 2540;
}
else
{
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2532;
+ return 2564;
}
}
else
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2524;
+ return 2556;
}
else
{
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2516;
+ return 2548;
}
}
}
}
else
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001100xxxxxxxxxxxxxxxx0xxxx
- bfmopa. */
- return 2363;
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001100xxxxxxxxxxxxxxxx00xxx
+ bfmopa. */
+ return 2363;
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxxxxxxxxxx00xxx
+ fmlal. */
+ return 2477;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xxxxxxxxxx00xxx
+ fmlal. */
+ return 2478;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xxxxxxxxxx00xxx
+ fmlal. */
+ return 2479;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx00xxx
+ usmopa. */
+ return 2384;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001100xxxxxxxxxxxxxxxx0xxxx
- usmopa. */
- return 2384;
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001100xxxxxxxxxxxxxxxx10xxx
+ bfmops. */
+ return 2364;
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxxxxxxxxxx10xxx
+ bfmlal. */
+ return 2436;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xxxxxxxxxx10xxx
+ bfmlal. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xxxxxxxxxx10xxx
+ bfmlal. */
+ return 2438;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx10xxx
+ usmops. */
+ return 2386;
+ }
}
}
else
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001100xxxxxxxxxxxxxxxx1xxxx
- bfmops. */
- return 2364;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxxxxxxxxxx01xxx
+ fmlsl. */
+ return 2491;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xxxxxxxxxx01xxx
+ fmlsl. */
+ return 2492;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xxxxxxxxxx01xxx
+ fmlsl. */
+ return 2493;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001100xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2386;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxxxxxxxxxx11xxx
+ bfmlsl. */
+ return 2444;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xxxxxxxxxx11xxx
+ bfmlsl. */
+ return 2445;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xxxxxxxxxx11xxx
+ bfmlsl. */
+ return 2446;
+ }
+ }
}
}
}
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2471;
+ return 2503;
}
else
{
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2495;
+ return 2527;
}
}
else
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2487;
+ return 2519;
}
else
{
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2479;
+ return 2511;
}
}
}
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxxx00xxx
fmla. */
- return 2455;
+ return 2471;
}
else
{
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxxx10xxx
fmls. */
- return 2461;
+ return 2485;
}
}
}
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2472;
+ return 2504;
}
else
{
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2496;
+ return 2528;
}
}
else
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2488;
+ return 2520;
}
else
{
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2480;
+ return 2512;
}
}
}
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxxx00xxx
fmla. */
- return 2456;
+ return 2472;
}
else
{
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxxx10xxx
fmls. */
- return 2462;
+ return 2486;
}
}
}
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2503;
+ return 2535;
}
else
{
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2504;
+ return 2536;
}
}
else
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2527;
+ return 2559;
}
else
{
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2528;
+ return 2560;
}
}
}
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2519;
+ return 2551;
}
else
{
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2520;
+ return 2552;
}
}
else
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2511;
+ return 2543;
}
else
{
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2512;
+ return 2544;
}
}
}
{
if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx0xxxxxxxxxx0xxxx
- fmla. */
- return 2671;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xx0xxxxxxx00xxx
+ fmla. */
+ return 2735;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xx0xxxxxxx00xxx
+ fmla. */
+ return 2736;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxx1xxxxxxx00xxx
+ smlal. */
+ return 2603;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xx1xxxxxxx00xxx
+ smlal. */
+ return 2604;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xx1xxxxxxx00xxx
+ smlal. */
+ return 2605;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx1xxxxxxxxxx0xxxx
- fmla. */
- return 2672;
- }
- }
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxxxxxxxxxx01xxx
+ smlsl. */
+ return 2611;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xxxxxxxxxx01xxx
+ smlsl. */
+ return 2612;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xxxxxxxxxx01xxx
+ smlsl. */
+ return 2613;
+ }
+ }
+ }
+ }
else
{
if (((word >> 30) & 0x1) == 0)
}
else
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx0xxxxxxxxxx1xxxx
- fmls. */
- return 2673;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xx0xxxxxxx10xxx
+ fmls. */
+ return 2737;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xx0xxxxxxx10xxx
+ fmls. */
+ return 2738;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxx1xxxxxxx10xxx
+ umlal. */
+ return 2706;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xx1xxxxxxx10xxx
+ umlal. */
+ return 2707;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xx1xxxxxxx10xxx
+ umlal. */
+ return 2708;
+ }
+ }
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx000001110xxxxx1xxxxxxxxxx1xxxx
- fmls. */
- return 2674;
+ xx100001110xxxxxxxxxxxxxxxx10xxx
+ usmops. */
+ return 2387;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001110xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2387;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011100xxxxxxxxxxxxxxx11xxx
+ umlsl. */
+ return 2714;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx0xxxxxxxxxx11xxx
+ umlsl. */
+ return 2715;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx1xxxxxxxxxx11xxx
+ umlsl. */
+ return 2716;
+ }
+ }
}
}
}
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx00xxx
+ fmlal. */
+ return 2481;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx00xxx
+ fmlal. */
+ return 2482;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx00xxx
+ fmlal. */
+ return 2483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx00xxx
+ fmlal. */
+ return 2484;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx00xxx
+ smlal. */
+ return 2607;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx00xxx
+ smlal. */
+ return 2608;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx00xxx
+ smlal. */
+ return 2609;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx00xxx
+ smlal. */
+ return 2610;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx00xxx
+ fmla. */
+ return 2473;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx00xxx
+ fmla. */
+ return 2474;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx00xxx
+ fmla. */
+ return 2475;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx00xxx
+ fmla. */
+ return 2476;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx00xxx
- fmla. */
- return 2457;
+ x1000001x01xxxxx0xx0x1xxxxx00xxx
+ fmlal. */
+ return 2480;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx00xxx
- fmla. */
- return 2458;
+ x1000001x11xxxxx0xx0x1xxxxx00xxx
+ smlal. */
+ return 2606;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx00xxx
- fmla. */
- return 2459;
+ x1000001xx1xxxx00xx1x1xxxxx00xxx
+ fadd. */
+ return 2453;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx00xxx
- fmla. */
- return 2460;
+ x1000001xx1xxxx10xx1x1xxxxx00xxx
+ fadd. */
+ return 2454;
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx00xxx
- fadd. */
- return 2437;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2441;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2442;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2443;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx10xxx
+ umlal. */
+ return 2710;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx10xxx
+ umlal. */
+ return 2711;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx10xxx
+ umlal. */
+ return 2712;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx10xxx
+ umlal. */
+ return 2713;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx00xxx
- fadd. */
- return 2438;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx10xxx
+ add. */
+ return 2430;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx10xxx
+ add. */
+ return 2431;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx10xxx
+ add. */
+ return 2432;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx10xxx
+ add. */
+ return 2433;
+ }
+ }
}
}
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
+ else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx10xxx
- add. */
- return 2430;
+ x1000001x01xxxxx0xx0x1xxxxx10xxx
+ bfmlal. */
+ return 2439;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx10xxx
- add. */
- return 2431;
+ x1000001x11xxxxx0xx0x1xxxxx10xxx
+ umlal. */
+ return 2709;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx10xxx
+ x1000001xx1xxxx00xx1x1xxxxx10xxx
add. */
- return 2432;
+ return 2428;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx10xxx
+ x1000001xx1xxxx10xx1x1xxxxx10xxx
add. */
- return 2433;
+ return 2429;
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2495;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2496;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2497;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2498;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx01xxx
+ smlsl. */
+ return 2615;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx01xxx
+ smlsl. */
+ return 2616;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx01xxx
+ smlsl. */
+ return 2617;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx01xxx
+ smlsl. */
+ return 2618;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx01xxx
+ fmls. */
+ return 2487;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx01xxx
+ fmls. */
+ return 2488;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx01xxx
+ fmls. */
+ return 2489;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx01xxx
+ fmls. */
+ return 2490;
+ }
}
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx10xxx
- add. */
- return 2428;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x01xxxxx0xx0x1xxxxx01xxx
+ fmlsl. */
+ return 2494;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x11xxxxx0xx0x1xxxxx01xxx
+ smlsl. */
+ return 2614;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx10xxx
- add. */
- return 2429;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xx1x1xxxxx01xxx
+ fsub. */
+ return 2499;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xx1x1xxxxx01xxx
+ fsub. */
+ return 2500;
+ }
}
}
}
- }
- else
- {
- if (((word >> 4) & 0x1) == 0)
+ else
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx01xxx
- fmls. */
- return 2463;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2448;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2449;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2450;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2451;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx01xxx
- fmls. */
- return 2464;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx11xxx
+ umlsl. */
+ return 2718;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx11xxx
+ umlsl. */
+ return 2719;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx11xxx
+ umlsl. */
+ return 2720;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx11xxx
+ umlsl. */
+ return 2721;
+ }
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx01xxx
- fmls. */
- return 2465;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx11xxx
+ sub. */
+ return 2694;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx11xxx
+ sub. */
+ return 2695;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx01xxx
- fmls. */
- return 2466;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx11xxx
+ sub. */
+ return 2696;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx11xxx
+ sub. */
+ return 2697;
+ }
}
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx01xxx
- fsub. */
- return 2467;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx01xxx
- fsub. */
- return 2468;
- }
- }
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx11xxx
- sub. */
- return 2646;
+ x1000001x01xxxxx0xx0x1xxxxx11xxx
+ bfmlsl. */
+ return 2447;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx11xxx
- sub. */
- return 2647;
+ x1000001x11xxxxx0xx0x1xxxxx11xxx
+ umlsl. */
+ return 2717;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx11xxx
+ x1000001xx1xxxx00xx1x1xxxxx11xxx
sub. */
- return 2648;
+ return 2692;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx11xxx
+ x1000001xx1xxxx10xx1x1xxxxx11xxx
sub. */
- return 2649;
+ return 2693;
}
}
}
- else
- {
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx11xxx
- sub. */
- return 2644;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx11xxx
- sub. */
- return 2645;
- }
- }
}
}
}
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2561;
+ return 2593;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2562;
+ return 2594;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2563;
+ return 2595;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2565;
+ return 2597;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2564;
+ return 2596;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2566;
+ return 2598;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2571;
+ return 2619;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2573;
+ return 2621;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2572;
+ return 2620;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2574;
+ return 2622;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2439;
+ return 2455;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2441;
+ return 2457;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2440;
+ return 2456;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2442;
+ return 2458;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2567;
+ return 2599;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2569;
+ return 2601;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2568;
+ return 2600;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2570;
+ return 2602;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2575;
+ return 2623;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2577;
+ return 2625;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2576;
+ return 2624;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2578;
+ return 2626;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx0
fmaxnm. */
- return 2443;
+ return 2459;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx0
fmaxnm. */
- return 2445;
+ return 2461;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx0
fmaxnm. */
- return 2444;
+ return 2460;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx0
fmaxnm. */
- return 2446;
+ return 2462;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2650;
+ return 2698;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2652;
+ return 2700;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2651;
+ return 2699;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2653;
+ return 2701;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx0xxxx1
fmin. */
- return 2447;
+ return 2463;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx0xxxx1
fmin. */
- return 2449;
+ return 2465;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx0xxxx1
fmin. */
- return 2448;
+ return 2464;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx0xxxx1
fmin. */
- return 2450;
+ return 2466;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2654;
+ return 2702;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2656;
+ return 2704;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2655;
+ return 2703;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2657;
+ return 2705;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2658;
+ return 2722;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2660;
+ return 2724;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2659;
+ return 2723;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2661;
+ return 2725;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx1
fminnm. */
- return 2451;
+ return 2467;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx1
fminnm. */
- return 2453;
+ return 2469;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx1
fminnm. */
- return 2452;
+ return 2468;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx1
fminnm. */
- return 2454;
+ return 2470;
}
}
}
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2585;
+ return 2633;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2609;
+ return 2657;
}
}
else
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2601;
+ return 2649;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2593;
+ return 2641;
}
}
}
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2617;
+ return 2665;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2641;
+ return 2689;
}
}
else
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2633;
+ return 2681;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2625;
+ return 2673;
}
}
}
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2586;
+ return 2634;
}
else
{
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2643;
+ return 2691;
}
}
else
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2610;
+ return 2658;
}
}
else
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2602;
+ return 2650;
}
else
{
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2594;
+ return 2642;
}
}
}
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2618;
+ return 2666;
}
else
{
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2642;
+ return 2690;
}
}
else
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2634;
+ return 2682;
}
else
{
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2626;
+ return 2674;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2581;
+ return 2629;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2582;
+ return 2630;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2605;
+ return 2653;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2606;
+ return 2654;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2597;
+ return 2645;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2598;
+ return 2646;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2589;
+ return 2637;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2590;
+ return 2638;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2613;
+ return 2661;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2614;
+ return 2662;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2637;
+ return 2685;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2638;
+ return 2686;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2629;
+ return 2677;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2630;
+ return 2678;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2621;
+ return 2669;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2622;
+ return 2670;
}
}
}
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2715;
+ return 2779;
}
else
{
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2723;
+ return 2787;
}
}
else
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2719;
+ return 2783;
}
else
{
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2726;
+ return 2790;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2775;
+ return 2839;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2781;
+ return 2845;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2778;
+ return 2842;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2784;
+ return 2848;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2799;
+ return 2863;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2805;
+ return 2869;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2802;
+ return 2866;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2808;
+ return 2872;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2787;
+ return 2851;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2793;
+ return 2857;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2790;
+ return 2854;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2796;
+ return 2860;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2811;
+ return 2875;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2817;
+ return 2881;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2814;
+ return 2878;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2820;
+ return 2884;
}
}
}
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2716;
+ return 2780;
}
else
{
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2724;
+ return 2788;
}
}
else
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2720;
+ return 2784;
}
else
{
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2727;
+ return 2791;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2776;
+ return 2840;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2782;
+ return 2846;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2779;
+ return 2843;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2785;
+ return 2849;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2800;
+ return 2864;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2806;
+ return 2870;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2803;
+ return 2867;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2809;
+ return 2873;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2788;
+ return 2852;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2794;
+ return 2858;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2791;
+ return 2855;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2797;
+ return 2861;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2812;
+ return 2876;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2818;
+ return 2882;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2815;
+ return 2879;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2821;
+ return 2885;
}
}
}
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2718;
+ return 2782;
}
else
{
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2725;
+ return 2789;
}
}
else
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2722;
+ return 2786;
}
}
else
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2717;
+ return 2781;
}
else
{
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2721;
+ return 2785;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2777;
+ return 2841;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2871;
+ return 2935;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2783;
+ return 2847;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2873;
+ return 2937;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2780;
+ return 2844;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2872;
+ return 2936;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2786;
+ return 2850;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2801;
+ return 2865;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2877;
+ return 2941;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2807;
+ return 2871;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2879;
+ return 2943;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2804;
+ return 2868;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2878;
+ return 2942;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2810;
+ return 2874;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2789;
+ return 2853;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2874;
+ return 2938;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2795;
+ return 2859;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2876;
+ return 2940;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2792;
+ return 2856;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2875;
+ return 2939;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2798;
+ return 2862;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2813;
+ return 2877;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2880;
+ return 2944;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2819;
+ return 2883;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2882;
+ return 2946;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2816;
+ return 2880;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2881;
+ return 2945;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2822;
+ return 2886;
}
}
}
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2900;
+ return 2964;
}
else
{
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2903;
+ return 2967;
}
}
}
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2713;
+ return 2777;
}
else
{
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2714;
+ return 2778;
}
}
else
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2905;
+ return 2969;
}
}
}
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2902;
+ return 2966;
}
else
{
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2712;
+ return 2776;
}
else
{
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2904;
+ return 2968;
}
}
}
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2906;
+ return 2970;
}
}
}
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2901;
+ return 2965;
}
else
{
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2732;
+ return 2796;
}
}
}
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2733;
+ return 2797;
}
}
}
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2731;
+ return 2795;
}
}
}
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2760;
+ return 2824;
}
}
else
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2736;
+ return 2800;
}
else
{
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2737;
+ return 2801;
}
}
else
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2757;
+ return 2821;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2764;
+ return 2828;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2763;
+ return 2827;
}
}
else
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2756;
+ return 2820;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2762;
+ return 2826;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2761;
+ return 2825;
}
}
else
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2740;
+ return 2804;
}
else
{
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2741;
+ return 2805;
}
}
else
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2734;
+ return 2798;
}
else
{
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2758;
+ return 2822;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2735;
+ return 2799;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2744;
+ return 2808;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2746;
+ return 2810;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2748;
+ return 2812;
}
}
}
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2745;
+ return 2809;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2747;
+ return 2811;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2749;
+ return 2813;
}
}
}
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2728;
+ return 2792;
}
else
{
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2730;
+ return 2794;
}
}
else
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2729;
+ return 2793;
}
}
}
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2738;
+ return 2802;
}
else
{
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2739;
+ return 2803;
}
}
}
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2742;
+ return 2806;
}
else
{
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2743;
+ return 2807;
}
}
}
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2662;
+ return 2726;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2663;
+ return 2727;
}
}
else
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2558;
+ return 2590;
}
}
}
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2665;
+ return 2729;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2664;
+ return 2728;
}
}
else
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2560;
+ return 2592;
}
}
}
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2669;
+ return 2733;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2666;
+ return 2730;
}
}
else
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2559;
+ return 2591;
}
}
}
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2667;
+ return 2731;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2668;
+ return 2732;
}
}
else
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2759;
+ return 2823;
}
}
else
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2436;
+ return 2452;
}
}
else
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2895;
+ return 2959;
}
else
{
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2823;
+ return 2887;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2825;
+ return 2889;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2829;
+ return 2893;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2831;
+ return 2895;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2826;
+ return 2890;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2828;
+ return 2892;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2832;
+ return 2896;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2834;
+ return 2898;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2847;
+ return 2911;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2849;
+ return 2913;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2853;
+ return 2917;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2855;
+ return 2919;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2850;
+ return 2914;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2852;
+ return 2916;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2856;
+ return 2920;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2858;
+ return 2922;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2835;
+ return 2899;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2837;
+ return 2901;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2841;
+ return 2905;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2843;
+ return 2907;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2838;
+ return 2902;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2840;
+ return 2904;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2844;
+ return 2908;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2846;
+ return 2910;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2859;
+ return 2923;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2861;
+ return 2925;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2865;
+ return 2929;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2867;
+ return 2931;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2862;
+ return 2926;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2864;
+ return 2928;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2868;
+ return 2932;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2870;
+ return 2934;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2824;
+ return 2888;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2883;
+ return 2947;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2830;
+ return 2894;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2885;
+ return 2949;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2827;
+ return 2891;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2884;
+ return 2948;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2833;
+ return 2897;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2848;
+ return 2912;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2889;
+ return 2953;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2854;
+ return 2918;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2891;
+ return 2955;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2851;
+ return 2915;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2890;
+ return 2954;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2857;
+ return 2921;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2836;
+ return 2900;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2886;
+ return 2950;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2842;
+ return 2906;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2888;
+ return 2952;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2839;
+ return 2903;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2887;
+ return 2951;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2845;
+ return 2909;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2860;
+ return 2924;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2892;
+ return 2956;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2866;
+ return 2930;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2894;
+ return 2958;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2863;
+ return 2927;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2893;
+ return 2957;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2869;
+ return 2933;
}
}
}
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2750;
+ return 2814;
}
}
}
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2676;
+ return 2740;
}
}
else
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2752;
+ return 2816;
}
}
}
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2753;
+ return 2817;
}
}
else
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2683;
+ return 2747;
}
else
{
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2685;
+ return 2749;
}
}
else
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2687;
+ return 2751;
}
else
{
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2688;
+ return 2752;
}
else
{
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2681;
+ return 2745;
}
}
else
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2690;
+ return 2754;
}
}
else
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2689;
+ return 2753;
}
else
{
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2694;
+ return 2758;
}
}
else
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2691;
+ return 2755;
}
}
}
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2675;
+ return 2739;
}
}
else
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2751;
+ return 2815;
}
else
{
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2767;
+ return 2831;
}
else
{
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2765;
+ return 2829;
}
else
{
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2772;
+ return 2836;
}
else
{
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2771;
+ return 2835;
}
}
}
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2768;
+ return 2832;
}
else
{
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2769;
+ return 2833;
}
}
}
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2686;
+ return 2750;
}
}
else
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2679;
+ return 2743;
}
}
}
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2692;
+ return 2756;
}
}
}
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2682;
+ return 2746;
}
}
else
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2695;
+ return 2759;
}
}
else
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2680;
+ return 2744;
}
}
else
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2693;
+ return 2757;
}
}
else
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2684;
+ return 2748;
}
}
else
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2698;
+ return 2762;
}
else
{
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2702;
+ return 2766;
}
}
}
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2699;
+ return 2763;
}
else
{
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2703;
+ return 2767;
}
}
}
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2696;
+ return 2760;
}
else
{
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2700;
+ return 2764;
}
}
else
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2697;
+ return 2761;
}
else
{
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2701;
+ return 2765;
}
}
else
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2704;
+ return 2768;
}
else
{
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2708;
+ return 2772;
}
}
else
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2705;
+ return 2769;
}
else
{
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2709;
+ return 2773;
}
}
else
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2706;
+ return 2770;
}
else
{
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2710;
+ return 2774;
}
}
}
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2707;
+ return 2771;
}
else
{
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2711;
+ return 2775;
}
}
}
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2678;
+ return 2742;
}
else
{
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2677;
+ return 2741;
}
}
}
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2755;
+ return 2819;
}
else
{
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2754;
+ return 2818;
}
}
else
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2766;
+ return 2830;
}
else
{
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2774;
+ return 2838;
}
else
{
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2773;
+ return 2837;
}
}
}
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2546: value = 2554; break; /* mov --> mova. */
- case 2554: return NULL; /* mova --> NULL. */
- case 2542: value = 2550; break; /* mov --> mova. */
- case 2550: return NULL; /* mova --> NULL. */
- case 2544: value = 2552; break; /* mov --> mova. */
- case 2552: return NULL; /* mova --> NULL. */
- case 2540: value = 2548; break; /* mov --> mova. */
- case 2548: return NULL; /* mova --> NULL. */
- case 2547: value = 2555; break; /* mov --> mova. */
- case 2555: return NULL; /* mova --> NULL. */
- case 2543: value = 2551; break; /* mov --> mova. */
- case 2551: return NULL; /* mova --> NULL. */
- case 2545: value = 2553; break; /* mov --> mova. */
- case 2553: return NULL; /* mova --> NULL. */
- case 2541: value = 2549; break; /* mov --> mova. */
- case 2549: return NULL; /* mova --> NULL. */
+ case 2578: value = 2586; break; /* mov --> mova. */
+ case 2586: return NULL; /* mova --> NULL. */
+ case 2574: value = 2582; break; /* mov --> mova. */
+ case 2582: return NULL; /* mova --> NULL. */
+ case 2576: value = 2584; break; /* mov --> mova. */
+ case 2584: return NULL; /* mova --> NULL. */
+ case 2572: value = 2580; break; /* mov --> mova. */
+ case 2580: return NULL; /* mova --> NULL. */
+ case 2579: value = 2587; break; /* mov --> mova. */
+ case 2587: return NULL; /* mova --> NULL. */
+ case 2575: value = 2583; break; /* mov --> mova. */
+ case 2583: return NULL; /* mova --> NULL. */
+ case 2577: value = 2585; break; /* mov --> mova. */
+ case 2585: return NULL; /* mova --> NULL. */
+ case 2573: value = 2581; break; /* mov --> mova. */
+ case 2581: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2896; break; /* addg --> smax. */
- case 2896: value = 2897; break; /* smax --> umax. */
- case 2897: value = 2898; break; /* umax --> smin. */
- case 2898: value = 2899; break; /* smin --> umin. */
- case 2899: return NULL; /* umin --> NULL. */
+ case 19: value = 2960; break; /* addg --> smax. */
+ case 2960: value = 2961; break; /* smax --> umax. */
+ case 2961: value = 2962; break; /* umax --> smin. */
+ case 2962: value = 2963; break; /* smin --> umin. */
+ case 2963: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2770; break; /* fcvt --> bfcvt. */
- case 2770: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2834; break; /* fcvt --> bfcvt. */
+ case 2834: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
case 33:
case 34:
case 35:
- case 259:
+ case 263:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
case 193:
case 194:
case 237:
- case 253:
- case 254:
- case 256:
+ case 257:
case 258:
- case 263:
- case 264:
+ case 260:
+ case 262:
+ case 267:
+ case 268:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 255:
- case 257:
+ case 259:
+ case 261:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 245:
- case 246:
case 247:
case 248:
case 249:
case 250:
case 251:
case 252:
+ case 253:
+ case 254:
+ case 255:
+ case 256:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 242:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 243:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 244:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 245:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 246:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 260:
- case 261:
- case 262:
+ case 264:
+ case 265:
+ case 266:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
bool
aarch64_ext_sme_za_array (const aarch64_operand *self,
aarch64_opnd_info *info, aarch64_insn code,
- const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ const aarch64_inst *inst,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
int regno = extract_field (self->fields[0], code, 0);
else
regno += 8;
int imm = extract_field (self->fields[1], code, 0);
+ int num_offsets = get_operand_specific_data (self);
+ if (num_offsets == 0)
+ num_offsets = 1;
info->indexed_za.index.regno = regno;
- info->indexed_za.index.imm = imm;
+ info->indexed_za.index.imm = imm * num_offsets;
+ info->indexed_za.index.countm1 = num_offsets - 1;
info->indexed_za.group_size = get_opcode_dependent_value (inst->opcode);
return true;
}
{AARCH64_OPND_CLASS_SVE_REG, "SME_PNn3_INDEX2", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNn3, FLD_imm2_8}, "an indexed SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off2x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm2_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_5}, "ZA array"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm4_0}, "ZA array"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX1_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm1_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_15}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_16}, "an indexed SVE vector register"},
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
+ { 2, 1 }, /* imm1_2: general immediate in bits [2]. */
{ 8, 1 }, /* imm1_8: general immediate in bits [8]. */
{ 10, 1 }, /* imm1_10: general immediate in bits [10]. */
+ { 15, 1 }, /* imm1_15: general immediate in bits [15]. */
{ 16, 1 }, /* imm1_16: general immediate in bits [16]. */
+ { 0, 2 }, /* imm2_0: general immediate in bits [1:0]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
{ 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_2:
+ case AARCH64_OPND_SME_Zm_INDEX3_10:
size = get_operand_fields_width (get_operand_from_code (type)) - 4;
if (!check_reglane (opnd, mismatch_detail, idx, "z", 0, 15,
0, (1 << size) - 1))
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off2x2:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 3, 2,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
+ case AARCH64_OPND_SME_ZA_array_off3x2:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 7, 2,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_ZA_HV_idx_srcxN:
case AARCH64_OPND_SME_ZA_HV_idx_destxN:
size = aarch64_get_qualifier_esize (opnd->qualifier);
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_2:
+ case AARCH64_OPND_SME_Zm_INDEX3_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
print_sme_za_list (buf, size, opnd->reg.regno, styler);
break;
+ case AARCH64_OPND_SME_ZA_array_off2x2:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
+ case AARCH64_OPND_SME_ZA_array_off3x2:
case AARCH64_OPND_SME_ZA_array_off4:
snprintf (buf, size, "%s[%s, %s%s%s%s%s]",
style_reg (styler, "za%s%s",
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm1_2,
FLD_imm1_8,
FLD_imm1_10,
+ FLD_imm1_15,
FLD_imm1_16,
+ FLD_imm2_0,
FLD_imm2_8,
FLD_imm2_10,
FLD_imm2_15,
SME2_INSN ("add", 0xc1a11810, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("add", 0xc120a300, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("add", 0xc120ab00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("bfmlal", 0xc1801010, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlal", 0xc1901010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlal", 0xc1909010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlal", 0xc1200c10, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlal", 0xc1200810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlal", 0xc1300810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlal", 0xc1a00810, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlal", 0xc1a10810, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlsl", 0xc1801018, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlsl", 0xc1901018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlsl", 0xc1909018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlsl", 0xc1200c18, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlsl", 0xc1200818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlsl", 0xc1300818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlsl", 0xc1a00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlsl", 0xc1a10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fmla", 0xc1301800, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fmla", 0xc1a01800, 0xffa19c38, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fmla", 0xc1a11800, 0xffa39c78, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmlal", 0xc1801000, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlal", 0xc1901000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlal", 0xc1909000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlal", 0xc1200c00, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlal", 0xc1200800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlal", 0xc1300800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlal", 0xc1a00800, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlal", 0xc1a10800, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fmls", 0xc1500010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (2), 0),
SME2_INSN ("fmls", 0xc1508010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (4), 0),
SME2_INSN ("fmls", 0xc1201808, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fmls", 0xc1301808, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fmls", 0xc1a01808, 0xffa19c38, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fmls", 0xc1a11808, 0xffa39c78, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmlsl", 0xc1801008, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlsl", 0xc1901008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlsl", 0xc1909008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlsl", 0xc1200c08, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlsl", 0xc1200808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlsl", 0xc1300808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlsl", 0xc1a00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlsl", 0xc1a10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("smin", 0xc120a820, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("smin", 0xc120b020, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("smin", 0xc120b820, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smlal", 0xc1c01000, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlal", 0xc1d01000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlal", 0xc1d09000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlal", 0xc1600c00, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlal", 0xc1600800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlal", 0xc1700800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlal", 0xc1e00800, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlal", 0xc1e10800, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsl", 0xc1c01008, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlsl", 0xc1d01008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlsl", 0xc1d09008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsl", 0xc1600c08, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlsl", 0xc1600808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlsl", 0xc1700808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsl", 0xc1e00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlsl", 0xc1e10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umin", 0xc120a821, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umin", 0xc120b021, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umin", 0xc120b821, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umlal", 0xc1c01010, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlal", 0xc1d01010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlal", 0xc1d09010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlal", 0xc1600c10, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlal", 0xc1600810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlal", 0xc1700810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlal", 0xc1e00810, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlal", 0xc1e10810, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsl", 0xc1c01018, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlsl", 0xc1d01018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlsl", 0xc1d09018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsl", 0xc1600c18, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlsl", 0xc1600818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlsl", 0xc1700818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsl", 0xc1e00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlsl", 0xc1e10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off2x2", \
+ 2 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm2_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_0", 0, \
F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_5", 0, \
F(FLD_SME_Rv,FLD_imm3_5), "ZA array") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3x2", \
+ 2 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off4", 0, \
F(FLD_SME_Rv,FLD_imm4_0), "ZA array") \
Y(ADDRESS, sme_addr_ri_u4xvl, "SME_ADDR_RI_U4xVL", 0 << OPD_F_OD_LSB, \
F(FLD_SME_Zm, FLD_imm1_10), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX2", 0, \
F(FLD_SME_Zm, FLD_imm2_10), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX3_2", 0, \
+ F(FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2), \
+ "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX3_10", 0, \
+ F(FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10), \
+ "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX1_16", 0, \
F(FLD_SVE_Zn, FLD_imm1_16), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX2_15", 0, \