dev-arm: Add flash1 memory to VExpress_GEM5 platform
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 17 Mar 2020 16:55:01 +0000 (16:55 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 23 Mar 2020 19:07:59 +0000 (19:07 +0000)
Change-Id: I013241ac99fe42cdef437a396732447726beedd0
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26833
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/RealView.py

index 93f6e1290039d254bb4701b6846162ad69b0c42a..f9b9cb2fd84f0e9ce5ae959f9c68b74b6bd96b9d 100644 (file)
@@ -850,7 +850,7 @@ Memory map:
    0x00000000-0x03ffffff: Boot memory (CS0)
    0x04000000-0x07ffffff: Reserved
    0x08000000-0x0bffffff: NOR FLASH0 (CS0 alias)
-   0x0c000000-0x0fffffff: Reserved (Off-chip, CS4)
+   0x0c000000-0x0fffffff: NOR FLASH1 (Off-chip, CS4)
    0x10000000-0x13ffffff: gem5-specific peripherals (Off-chip, CS5)
        0x10000000-0x1000ffff: gem5 energy controller
        0x10010000-0x1001ffff: gem5 pseudo-ops
@@ -1038,6 +1038,10 @@ Interrupts:
                    interrupt=ArmSPI(num=75)),
     ]
 
+    # NOR flash, flash1
+    flash1 = SimpleMemory(range=AddrRange(0x0c000000, 0x10000000),
+                          conf_table_reported=False)
+
     def _off_chip_devices(self):
         return [
             self.realview_io,
@@ -1054,6 +1058,11 @@ Interrupts:
             self.vio[1],
         ] + self.uart
 
+    def _off_chip_memory(self):
+        return [
+            self.flash1,
+        ]
+
     def __init__(self, **kwargs):
         super(VExpress_GEM5_Base, self).__init__(**kwargs)
         self.clock32KHz.voltage_domain = self.io_voltage