Fixed sign propagation in bit-wise operators

diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 830778227a14c5e43948910ff8826c0fe18193de..7a9c8ba645054fecb7017d9d46980e9f825388de 100644 (file)
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -896,6 +896,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
                        int width = std::max(left.width, right.width);
                        if (width_hint > 0)
                                width = width_hint;
+                       is_signed = children[0]->is_signed && children[1]->is_signed;
                        return binop2rtlil(this, type_name, width, left, right);
                }