Add clz opcode.

opcodes/
	* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
	* microblaze-opcm.h (microblaze_instr): add clz

gas/testsuite/
	* gas/microblaze/allinsn.s: Add clz insn
	* gas/microblaze/allinsn.d: Likewise

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 9387158d43b39cad7bb9d32e5da58a940b8653b7..c2a66c8f416179287cd9b48008fc3d96e9e48455 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-08  David Holsgrove  <david.holsgrove@xilinx.com>
+
+       * gas/microblaze/allinsn.s: Add clz insn
+       * gas/microblaze/allinsn.d: Likewise
+
 2012-11-14  David Holsgrove  <david.holsgrove@xilinx.com>
 
        * gas/microblaze/allinsn.exp: New file - test newly added opcodes

diff --git a/gas/testsuite/gas/microblaze/allinsn.d b/gas/testsuite/gas/microblaze/allinsn.d
index 79064ba11ed3a03c01424fca38dd5eb09410f882..c7854f18a3325437d88521b8aa0c5bc9ac990e60 100644 (file)
--- a/gas/testsuite/gas/microblaze/allinsn.d
+++ b/gas/testsuite/gas/microblaze/allinsn.d
@@ -22,3 +22,6 @@ Disassembly of section .text:
 
 00000014 <swr>:
   14:  d8000200        swr     r0, r0, r0
+
+00000018 <clz>:
+  18:  900000e0        clz     r0, r0

diff --git a/gas/testsuite/gas/microblaze/allinsn.s b/gas/testsuite/gas/microblaze/allinsn.s
index 8bb3ef585797a978a8a0e7c62d457fc5f6a01493..0e4271d409cbafa348b44e3a10083f2a7536e707 100644 (file)
--- a/gas/testsuite/gas/microblaze/allinsn.s
+++ b/gas/testsuite/gas/microblaze/allinsn.s
@@ -24,4 +24,8 @@ shr:
     .global swr
 swr:
     swr r0,r0,r0
+    .text
+    .global clz
+clz:
+    clz r0,r0
 

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 69248f82875804a02fa5d0f5a2a6fed532246802..2efcdd22403d0abcb513e45c116f0779ac13addf 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
+
+       * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
+       * microblaze-opcm.h (microblaze_instr): add clz
+
 2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>
 
        * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add lbur, 

diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
index 44c9d38715c19a6dd6f9724c599fdc8296f3aeaf..132b95146565824895885b8cb3abc1474d590f5b 100644 (file)
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -96,7 +96,7 @@
 #define DELAY_SLOT 1
 #define NO_DELAY_SLOT 0
 
-#define MAX_OPCODES 284
+#define MAX_OPCODES 285
 
 struct op_code_struct
 {
@@ -394,6 +394,7 @@ struct op_code_struct
   {"tneaputd",  INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006E0, OPCODE_MASK_H34C, tneaputd,  anyware_inst },
   {"necaputd",  INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000760, OPCODE_MASK_H34C, necaputd,  anyware_inst },
   {"tnecaputd", INST_TYPE_R2,    INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007E0, OPCODE_MASK_H34C, tnecaputd, anyware_inst },
+  {"clz",       INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34,  clz,       special_inst },
   {"", 0, 0, 0, 0, 0, 0, 0, 0},
 };
 

diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
index a3bec497db5626ba7eac4d08d94fb53c8ce64809..58e6fd45340bafb4858b5cec3936454cd8cbf114 100644 (file)
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -25,7 +25,7 @@
 
 enum microblaze_instr
 {
-  add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, cmp, cmpu,
+  add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu,
   addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, 
   mulh, mulhu, mulhsu,
   idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,