IX86_BUILTIN_LOADDQU,
IX86_BUILTIN_STOREDQU,
- IX86_BUILTIN_MOVQ,
- IX86_BUILTIN_LOADD,
- IX86_BUILTIN_STORED,
IX86_BUILTIN_PACKSSWB,
IX86_BUILTIN_PACKSSDW,
IX86_BUILTIN_MASKMOVDQU,
IX86_BUILTIN_MOVMSKPD,
IX86_BUILTIN_PMOVMSKB128,
- IX86_BUILTIN_MOVQ2DQ,
- IX86_BUILTIN_MOVDQ2Q,
IX86_BUILTIN_PACKSSWB128,
IX86_BUILTIN_PACKSSDW128,
IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI,
IX86_BUILTIN_VEC_EXT_V4SF,
+ IX86_BUILTIN_VEC_EXT_V4SI,
IX86_BUILTIN_VEC_EXT_V8HI,
IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI,
= build_function_type_list (V2SI_type_node,
V2SF_type_node, V2SF_type_node, NULL_TREE);
tree pint_type_node = build_pointer_type (integer_type_node);
- tree pcint_type_node = build_pointer_type (
- build_type_variant (integer_type_node, 1, 0));
tree pdouble_type_node = build_pointer_type (double_type_node);
tree pcdouble_type_node = build_pointer_type (
build_type_variant (double_type_node, 1, 0));
intTI_type_node, intTI_type_node, NULL_TREE);
tree void_ftype_pcvoid
= build_function_type_list (void_type_node, const_ptr_type_node, NULL_TREE);
- tree v2di_ftype_di
- = build_function_type_list (V2DI_type_node,
- long_long_unsigned_type_node, NULL_TREE);
- tree di_ftype_v2di
- = build_function_type_list (long_long_unsigned_type_node,
- V2DI_type_node, NULL_TREE);
tree v4sf_ftype_v4si
= build_function_type_list (V4SF_type_node, V4SI_type_node, NULL_TREE);
tree v4si_ftype_v4sf
tree void_ftype_pchar_v16qi
= build_function_type_list (void_type_node,
pchar_type_node, V16QI_type_node, NULL_TREE);
- tree v4si_ftype_pcint
- = build_function_type_list (V4SI_type_node, pcint_type_node, NULL_TREE);
- tree void_ftype_pcint_v4si
- = build_function_type_list (void_type_node,
- pcint_type_node, V4SI_type_node, NULL_TREE);
- tree v2di_ftype_v2di
- = build_function_type_list (V2DI_type_node, V2DI_type_node, NULL_TREE);
tree float80_type;
tree float128_type;
/* SSE2 */
def_builtin (MASK_SSE2, "__builtin_ia32_maskmovdqu", void_ftype_v16qi_v16qi_pchar, IX86_BUILTIN_MASKMOVDQU);
- def_builtin (MASK_SSE2, "__builtin_ia32_movq2dq", v2di_ftype_di, IX86_BUILTIN_MOVQ2DQ);
- def_builtin (MASK_SSE2, "__builtin_ia32_movdq2q", di_ftype_v2di, IX86_BUILTIN_MOVDQ2Q);
def_builtin (MASK_SSE2, "__builtin_ia32_loadupd", v2df_ftype_pcdouble, IX86_BUILTIN_LOADUPD);
def_builtin (MASK_SSE2, "__builtin_ia32_storeupd", void_ftype_pdouble_v2df, IX86_BUILTIN_STOREUPD);
def_builtin (MASK_SSE2, "__builtin_ia32_mfence", void_ftype_void, IX86_BUILTIN_MFENCE);
def_builtin (MASK_SSE2, "__builtin_ia32_loaddqu", v16qi_ftype_pcchar, IX86_BUILTIN_LOADDQU);
- def_builtin (MASK_SSE2, "__builtin_ia32_loadd", v4si_ftype_pcint, IX86_BUILTIN_LOADD);
def_builtin (MASK_SSE2, "__builtin_ia32_storedqu", void_ftype_pchar_v16qi, IX86_BUILTIN_STOREDQU);
- def_builtin (MASK_SSE2, "__builtin_ia32_stored", void_ftype_pcint_v4si, IX86_BUILTIN_STORED);
- def_builtin (MASK_SSE2, "__builtin_ia32_movq", v2di_ftype_v2di, IX86_BUILTIN_MOVQ);
def_builtin (MASK_SSE2, "__builtin_ia32_pmuludq", di_ftype_v2si_v2si, IX86_BUILTIN_PMULUDQ);
def_builtin (MASK_SSE2, "__builtin_ia32_pmuludq128", v2di_ftype_v4si_v4si, IX86_BUILTIN_PMULUDQ128);
def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v4sf",
ftype, IX86_BUILTIN_VEC_EXT_V4SF);
+ ftype = build_function_type_list (intSI_type_node, V4SI_type_node,
+ integer_type_node, NULL_TREE);
+ def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v4si",
+ ftype, IX86_BUILTIN_VEC_EXT_V4SI);
+
ftype = build_function_type_list (intHI_type_node, V8HI_type_node,
integer_type_node, NULL_TREE);
def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v8hi",
case IX86_BUILTIN_LOADDQU:
return ix86_expand_unop_builtin (CODE_FOR_sse2_movdqu, arglist, target, 1);
- case IX86_BUILTIN_LOADD:
- return ix86_expand_unop_builtin (CODE_FOR_sse2_loadd, arglist, target, 1);
-
case IX86_BUILTIN_STOREDQU:
return ix86_expand_store_builtin (CODE_FOR_sse2_movdqu, arglist);
- case IX86_BUILTIN_STORED:
- return ix86_expand_store_builtin (CODE_FOR_sse2_stored, arglist);
case IX86_BUILTIN_MONITOR:
arg0 = TREE_VALUE (arglist);
case IX86_BUILTIN_VEC_EXT_V2DF:
case IX86_BUILTIN_VEC_EXT_V2DI:
case IX86_BUILTIN_VEC_EXT_V4SF:
+ case IX86_BUILTIN_VEC_EXT_V4SI:
case IX86_BUILTIN_VEC_EXT_V8HI:
case IX86_BUILTIN_VEC_EXT_V4HI:
return ix86_expand_vec_ext_builtin (arglist, target);
if (d->code == fcode)
return ix86_expand_sse_comi (d, arglist, target);
- /* @@@ Should really do something sensible here. */
- return 0;
+ gcc_unreachable ();
}
/* Store OPERAND to the memory after reload is completed. This means
}
vec = tmp;
use_vec_extr = true;
+ elt = 0;
break;
case V4SImode:
}
vec = tmp;
use_vec_extr = true;
+ elt = 0;
}
else
{
;; nonimmediate_operand for operand 2 and *not* allowing memory for the SSE
;; alternatives pretty much forces the MMX alternative to be chosen.
(define_insn "*sse_concatv2sf"
- [(set (match_operand:V2SF 0 "register_operand" "=x,*y")
+ [(set (match_operand:V2SF 0 "register_operand" "=x,x,*y,*y")
(vec_concat:V2SF
- (match_operand:SF 1 "register_operand" " 0, 0")
- (match_operand:SF 2 "register_operand" " x,*y")))]
+ (match_operand:SF 1 "nonimmediate_operand" " 0,m, 0, m")
+ (match_operand:SF 2 "vector_move_operand" " x,C,*y, C")))]
"TARGET_SSE"
"@
unpcklps\t{%2, %0|%0, %2}
- punpckldq\t{%2, %0|%0, %2}"
- [(set_attr "type" "sselog,mmxcvt")
- (set_attr "mode" "V4SF,DI")])
+ movss\t{%1, %0|%0, %1}
+ punpckldq\t{%2, %0|%0, %2}
+ movd\t{%1, %0|%0, %1}"
+ [(set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
+ (set_attr "mode" "V4SF,SF,DI,DI")])
(define_insn "*sse_concatv4sf"
[(set (match_operand:V4SF 0 "register_operand" "=x,x")
(zero_extend:SI
(vec_select:HI
(match_operand:V8HI 1 "register_operand" "x")
- (parallel [(match_operand:SI 2 "const_0_to_7_operand" "0")]))))]
+ (parallel [(match_operand:SI 2 "const_0_to_7_operand" "n")]))))]
"TARGET_SSE2"
"pextrw\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sselog")
operands[1] = gen_rtx_REG (DImode, REGNO (operands[1]));
})
-(define_expand "sse2_loadq"
- [(set (match_operand:V2DI 0 "register_operand" "")
- (vec_merge:V2DI
- (vec_duplicate:V2DI
- (match_operand:DI 1 "nonimmediate_operand" ""))
- (match_dup 2)
- (const_int 1)))]
- "TARGET_SSE"
- "operands[2] = CONST0_RTX (V2DImode);")
-
-(define_insn "*sse2_loadq"
- [(set (match_operand:V2DI 0 "register_operand" "=Y,?Y,Y,x")
- (vec_merge:V2DI
- (vec_duplicate:V2DI
- (match_operand:DI 1 "nonimmediate_operand" " m,*y,Y,0"))
- (match_operand:V2DI 2 "vector_move_operand" " C, C,0,x")
- (const_int 1)))]
- "TARGET_SSE && !TARGET_64BIT"
- "@
- movq\t{%1, %0|%0, %1}
- movq2dq\t{%1, %0|%0, %1}
- movq\t{%1, %0|%0, %1}
- shufps\t{$0xe4, %1, %0|%0, %1, 0xe4}"
- [(set_attr "type" "ssemov,ssemov,ssemov,sselog")
- (set_attr "mode" "TI,TI,TI,V4SF")])
-
-(define_insn "*sse2_loadq_rex64"
- [(set (match_operand:V2DI 0 "register_operand" "=x,?x,?x,x")
- (vec_merge:V2DI
- (vec_duplicate:V2DI
- (match_operand:DI 1 "nonimmediate_operand" " m,*y, r,x"))
- (match_operand:V2DI 2 "vector_move_operand" " C, C, C,0")
- (const_int 1)))]
- "TARGET_SSE2 && TARGET_64BIT"
- "@
- movq\t{%1, %0|%0, %1}
- movq2dq\t{%1, %0|%0, %1}
- movd\t{%1, %0|%0, %1}
- movq\t{%1, %0|%0, %1}"
- [(set_attr "type" "ssemov")
- (set_attr "mode" "TI")])
-
(define_insn "*vec_dupv4si"
[(set (match_operand:V4SI 0 "register_operand" "=Y,x")
(vec_duplicate:V4SI
projects / gcc.git / commitdiff